1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * serdes-bridge_split.c -- display bridge_split for different serdes chips
4 *
5 * Copyright (c) 2023 Rockchip Electronics Co. Ltd.
6 *
7 * Author: luowei <lw@rock-chips.com>
8 */
9
10 #include "core.h"
11
serdes_bridge_split_init(struct serdes * serdes)12 static void serdes_bridge_split_init(struct serdes *serdes)
13 {
14 if (serdes->vpower_supply)
15 regulator_set_enable(serdes->vpower_supply, true);
16
17 if (dm_gpio_is_valid(&serdes->enable_gpio))
18 dm_gpio_set_value(&serdes->enable_gpio, 1);
19
20 mdelay(5);
21
22 //video_bridge_set_active(serdes->dev, true);
23
24 if (serdes->chip_data->bridge_ops->init)
25 serdes->chip_data->bridge_ops->init(serdes);
26
27 serdes_i2c_set_sequence(serdes);
28
29 SERDES_DBG_MFD("%s: %s %s\n", __func__,
30 serdes->dev->name,
31 serdes->chip_data->name);
32 }
33
serdes_bridge_split_pre_enable(struct rockchip_bridge * bridge)34 static void serdes_bridge_split_pre_enable(struct rockchip_bridge *bridge)
35 {
36 struct udevice *dev = bridge->dev;
37 struct serdes *serdes = dev_get_priv(dev->parent);
38
39 //serdes_bridge_split_split_init(serdes);
40
41 if (serdes->chip_data->bridge_ops->pre_enable)
42 serdes->chip_data->bridge_ops->pre_enable(serdes);
43
44 SERDES_DBG_MFD("%s: %s %s\n", __func__,
45 serdes->dev->name,
46 serdes->chip_data->name);
47 }
48
serdes_bridge_split_post_disable(struct rockchip_bridge * bridge)49 static void serdes_bridge_split_post_disable(struct rockchip_bridge *bridge)
50 {
51 struct udevice *dev = bridge->dev;
52 struct serdes *serdes = dev_get_priv(dev->parent);
53
54 if (serdes->chip_data->bridge_ops->post_disable)
55 serdes->chip_data->bridge_ops->post_disable(serdes);
56
57 SERDES_DBG_MFD("%s: %s %s\n", __func__,
58 serdes->dev->name,
59 serdes->chip_data->name);
60 }
61
serdes_bridge_split_enable(struct rockchip_bridge * bridge)62 static void serdes_bridge_split_enable(struct rockchip_bridge *bridge)
63 {
64 struct udevice *dev = bridge->dev;
65 struct serdes *serdes = dev_get_priv(dev->parent);
66
67 if (serdes->chip_data->serdes_type == TYPE_DES)
68 serdes_bridge_split_init(serdes);
69
70 if (serdes->chip_data->bridge_ops->enable)
71 serdes->chip_data->bridge_ops->enable(serdes);
72
73 SERDES_DBG_MFD("%s: %s %s\n", __func__,
74 serdes->dev->name,
75 serdes->chip_data->name);
76 }
77
serdes_bridge_split_disable(struct rockchip_bridge * bridge)78 static void serdes_bridge_split_disable(struct rockchip_bridge *bridge)
79 {
80 struct udevice *dev = bridge->dev;
81 struct serdes *serdes = dev_get_priv(dev->parent);
82
83 if (serdes->chip_data->bridge_ops->disable)
84 serdes->chip_data->bridge_ops->disable(serdes);
85
86 SERDES_DBG_MFD("%s: %s %s\n", __func__, serdes->dev->name,
87 serdes->chip_data->name);
88 }
89
serdes_bridge_split_mode_set(struct rockchip_bridge * bridge,const struct drm_display_mode * mode)90 static void serdes_bridge_split_mode_set(struct rockchip_bridge *bridge,
91 const struct drm_display_mode *mode)
92 {
93 struct udevice *dev = bridge->dev;
94 struct serdes *serdes = dev_get_priv(dev->parent);
95
96 memcpy(&serdes->serdes_bridge_split->mode, mode,
97 sizeof(struct drm_display_mode));
98
99 SERDES_DBG_MFD("%s: %s %s\n", __func__, serdes->dev->name,
100 serdes->chip_data->name);
101 }
102
serdes_bridge_split_detect(struct rockchip_bridge * bridge)103 static bool serdes_bridge_split_detect(struct rockchip_bridge *bridge)
104 {
105 bool ret = true;
106 struct udevice *dev = bridge->dev;
107 struct serdes *serdes = dev_get_priv(dev->parent);
108
109 if (serdes->chip_data->bridge_ops->detect)
110 ret = serdes->chip_data->bridge_ops->detect(serdes, SER_LINKB);
111
112 SERDES_DBG_MFD("%s: %s %s %s\n", __func__, serdes->dev->name,
113 serdes->chip_data->name, ret ? "detected" : "no detected");
114
115 return ret;
116 }
117
118 struct rockchip_bridge_funcs serdes_bridge_split_ops = {
119 .pre_enable = serdes_bridge_split_pre_enable,
120 .post_disable = serdes_bridge_split_post_disable,
121 .enable = serdes_bridge_split_enable,
122 .disable = serdes_bridge_split_disable,
123 .mode_set = serdes_bridge_split_mode_set,
124 .detect = serdes_bridge_split_detect,
125 };
126
serdes_bridge_split_probe(struct udevice * dev)127 static int serdes_bridge_split_probe(struct udevice *dev)
128 {
129 struct rockchip_bridge *bridge;
130 struct serdes *serdes = dev_get_priv(dev->parent);
131 struct mipi_dsi_device *device = dev_get_platdata(dev);
132
133 serdes->sel_mipi = dev_read_bool(dev->parent, "sel-mipi");
134 if (serdes->sel_mipi) {
135 device->dev = dev;
136 device->lanes = dev_read_u32_default(dev->parent, "dsi,lanes", 4);
137 device->format = dev_read_u32_default(dev->parent, "dsi,format",
138 MIPI_DSI_FMT_RGB888);
139 device->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
140 device->channel = dev_read_u32_default(dev->parent, "reg", 0);
141 }
142
143 bridge = calloc(1, sizeof(*bridge));
144 if (!bridge)
145 return -ENOMEM;
146
147 dev->driver_data = (ulong)bridge;
148 bridge->dev = dev;
149 bridge->funcs = &serdes_bridge_split_ops;
150
151 serdes->serdes_bridge_split->bridge = bridge;
152
153 SERDES_DBG_MFD("%s: %s %s bridge=%p name=%s device=%p\n",
154 __func__, serdes->dev->name,
155 serdes->chip_data->name,
156 bridge, bridge->dev->name, device);
157
158 return 0;
159 }
160
161 static const struct udevice_id serdes_of_match[] = {
162 #if IS_ENABLED(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96745)
163 { .compatible = "maxim,max96745-bridge-split", },
164 #endif
165 #if IS_ENABLED(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96755)
166 { .compatible = "maxim,max96755-bridge-split", },
167 #endif
168 #if IS_ENABLED(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96789)
169 { .compatible = "maxim,max96789-bridge-split", },
170 #endif
171 { }
172 };
173
174 U_BOOT_DRIVER(serdes_bridge_split) = {
175 .name = "serdes-bridge-split",
176 .id = UCLASS_VIDEO_BRIDGE,
177 .of_match = serdes_of_match,
178 .probe = serdes_bridge_split_probe,
179 .priv_auto_alloc_size = sizeof(struct serdes_bridge_split),
180 .platdata_auto_alloc_size = sizeof(struct mipi_dsi_device),
181 };
182