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Searched refs:clk_post (Results 1 – 6 of 6) sorted by relevance

/rk3399_rockchip-uboot/include/
H A Dgeneric-phy-mipi-dphy.h36 unsigned int clk_post; member
/rk3399_rockchip-uboot/drivers/video/drm/
H A Dinno_mipi_phy.c202 u8 clk_post; member
359 v = T_CLK_POST(t->clk_post); in inno_mipi_dphy_timing_update()
362 v = T_CLK_POST_HI(t->clk_post >> 4); in inno_mipi_dphy_timing_update()
463 data.clk_post = DIV_ROUND_UP(timing.clkpost * txbyteclk, NSEC_PER_SEC); in inno_mipi_dphy_lane_timing_init()
488 TIMING_NS(data.clk_post, txbyteclk), in inno_mipi_dphy_lane_timing_init()
H A Dinno_video_combo_phy.c460 u32 hs_exit, clk_post, clk_pre, wakeup, lpx, ta_go, ta_sure, ta_wait; in inno_mipi_dphy_timing_init() local
485 clk_post = DIV_ROUND_UP(gotp.clkpost, t_txbyteclkhs); in inno_mipi_dphy_timing_init()
568 T_CLK_POST_HI(clk_post >> 4)); in inno_mipi_dphy_timing_init()
571 T_CLK_POST_CNT_LO(clk_post)); in inno_mipi_dphy_timing_init()
H A Dsamsung_mipi_dcphy.c167 u8 clk_post; member
1378 val = T_CLK_POST(timing->clk_post); in samsung_mipi_dphy_clk_lane_timing_init()
H A Ddw_mipi_dsi2.c241 unsigned int clk_post; member
937 cfg->clk_post = 60000 + 52 * ui; in mipi_dphy_get_default_config()
/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628_dsi.c957 u8 clk_post; in mipi_dphy_set_timing() member
989 testif_set_timing(dsi, 0x65, 0x0f, timing_table[index].clk_post); in mipi_dphy_set_timing()