| /rk3399_rockchip-uboot/doc/ |
| H A D | README.POST | 17 Also, standalone POST tests shall be supported.
28 2) The results of tests shall be saved so that it will be possible to
31 3) The following POST tests shall be developed for MPC823E-based
45 4) The LWMON board shall be used for reference.
50 The whole project can be divided into two independent tasks:
56 A new optional module will be added to U-Boot, which will run POST
61 The list of available POST tests will be configured at U-Boot build
63 tests. All POST tests will be divided into the following groups:
73 time and can be run on the regular basis (e.g. CPU test)
78 and cannot be run regularly (e.g. strong memory test, I2C test)
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| H A D | README.watchdog | 4 This enables hw_watchdog_reset to be called during various loops,
9 new code, so it must be serviced, but the board would rather it
10 was off. And, it cannot always be turned off once on.
13 Can be used to change the timeout for i.mx31/35/5x/6x.
15 be 128000 msec for i.mx31/35/5x/6x.
24 Can be used to change the timeout for FTWDT010.
30 TODO: vision2 is removed now, so perhaps this can be changed.
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| H A D | README.plan9 | 3 confaddr must be defined with the same value as CONFADDR (see mem.h).
4 Use of this facility is optional, but should be preferable to manual
7 When booting an image, arguments supplied to the bootm command will be
9 bootargs environment variable will be copied.
13 configuration could be simulated by issuing a fatload in bootcmd:
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| H A D | README.serial_multi | 7 At the moment, the ports must be split on a SMC and a SCC port on a
17 *) The console can be switched to SCC by any of the following commands:
23 *) The console can be switched to SMC by any of the following commands:
30 will be used which, in turn, can be switched by above commands.
32 *) The baudrate is the same for all serial devices. But it can be switched
46 *) The console can be switched to UART1 by any of the following commands:
51 *) The console can be switched to UART0 by any of the following commands:
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| H A D | README.silent | 1 The config option CONFIG_SILENT_CONSOLE can be used to quiet messages
2 on the console. If the option has been enabled, the output can be
16 - Until the console devices have been initialized, output has to be
25 the argument "console=" will be in the command line, no matter how
27 line to be affected, define CONFIG_SILENT_U_BOOT_ONLY in your board
28 config file as well, and this part of the feature will be disabled.
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| H A D | README.armada-secureboot | 12 7. Work to be done
19 a specially prepared boot image. This can be used to establish a chain of trust
25 one-time-writeable memory) need to be configured in the correct way.
49 be addressed:
56 (1) will be addressed later, (2) will be taken care of by U-Boot's build
58 data (essentially a series of U-Boot commands to be entered at the U-Boot
59 command prompt) will be created by the build system as well.
166 mode may be entered there, but since this mode is untested in the current
174 To employ the trusted boot framework, cryptographic key material needs to be
176 secured boot image: The KAK private key and a CSK private key (both have to be
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| H A D | README.update | 10 boot. The update file should be a FIT file, and can contain one or more
12 should be placed, updates are also protected with a SHA-1 checksum. If the
21 Note that when enabling auto-update, Flash support must be turned on. Also,
45 be non-negative and is 0 by default, CONFIG_UPDATE_TFTP_MSEC_MAX must be
50 1.2.0 or later, must also be available on the system where the update file is
51 to be prepared. Refer to the doc/uImage.FIT/ directory for more details on FIT
54 This mechanism can be also triggered by the command "fitupd".
65 A simple example that can be used to create an update file for automatically
83 'serverip' environment variable is accessible, the new U-Boot image will be
88 where the update will be placed is correct. Making mistake here and
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| H A D | README.srio-pcie-boot-corenet | 5 For some PowerPC processors with SRIO or PCIE interface, boot location can be
7 do without flash for u-boot image, ucode and ENV. All the images can be fetched
15 a) Master and slave can be SOCs in one board or SOCs in separate boards.
19 U-Boot images, UCodes will be stored in this flash.
33 Two P4080DS platforms can be used to implement the boot from SRIO or PCIE.
34 Their SRIO or PCIE ports 1 will be connected directly and will be used for
70 h) Since all cores of slave in holdoff, slave should be powered on before
71 all the above master's steps, and wait to be released by master. In the
90 For master, U-Boot image should be generated normally.
92 For example, master U-Boot image used on P4080DS should be compiled with
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| H A D | README.VSC3316-3308 | 16 … at address 79.h to be written is 0x02 for two-wire interface. Also for crosspoint connections to …
23 …rial interface. So the value in Interface mode register at address 79.h to be written is 0x02 for …
30 …tions. Connection through the VSC device requires the inputs and outputs to be properly configured.
37 num_con - number of connections to be configured
41 …For crosspoint connections to be activated, 01.h value need to be written in 75.h (core configurat…
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| H A D | README.clang | 4 is unlikely to be implemented soon because it requires additional LLVM
7 Since version 3.4 the ARM backend can be instructed to leave r9 alone.
15 to be converted this will solve itself. Boards which reassign gd in c
18 can be avoided by changing the init calls but this is not in mainline yet.
22 cannot be relocated and U-Boot will fail at runtime.
26 Binary packages can be installed as usual, e.g.:
34 It can also be used to compile sandbox:
42 is used instead. It needs a symlinks to be picked up correctly though:
52 Given that U-Boot will default to gcc, above commands can be
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| H A D | README.bootmenu | 12 the items. Current active menu item is highlighted and can be
28 menu entry will be selected automatically
35 <commands> are commands which will be executed when a menu
45 will be CONFIG_BOOTDELAY. If delay is 0, no menu entries will be shown on
47 be called immediately. If delay is less then 0, bootmenu will be shown and
48 autoboot will be disabled.
64 The above example will be rendered as below
82 Selected menu entry will be highlighted - it will have inverted
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| H A D | I2C_Edge_Conditions | 4 I2C devices may be left in a write state if a read was occuring
26 write rubbish into itself, i.e. the "offset" will be interpreted
27 as data to be written in location "device address".
33 This reset edge condition could possibly be present in every I2C
35 function can be implemented a i2c_init_board() function should be
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| H A D | feature-removal-schedule.txt | 1 The following is a list of files and features that are going to be
3 exactly is going away, when it will be gone, why it is being removed,
4 and who is going to be doing the work. When the feature is removed
5 from U-Boot, its corresponding entry should also be removed from this
15 defines (which are likely to be propagated to new platforms from
39 Such files shall be removed from the U-Boot source tree.
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| H A D | README.LED | 17 The following should be configured for each of the enabled LEDs:
24 is being acted on. As such, the value choose must be unique with with respect to
28 CONFIG_STATUS_LED_STATE is the initial state of the LED. It should be set to one
38 This must be a valid LED number (0-5).
40 CONFIG_STATUS_LED_RED is the red LED. It is used to signal errors. This must be
46 The following functions should be defined:
49 One time start up code should be placed here.
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| /rk3399_rockchip-uboot/tools/ |
| H A D | gpimage-common.c | 33 int gph_verify_header(struct gp_header *gph, int be) in gph_verify_header() argument
38 if (be) in gph_verify_header()
47 void gph_print_header(const struct gp_header *gph, int be) in gph_print_header() argument
51 if (be) in gph_print_header()
68 int be) in gph_set_header() argument
72 if (be) in gph_set_header()
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| H A D | gpheader.h | 35 int gph_verify_header(struct gp_header *gph, int be);
36 void gph_print_header(const struct gp_header *gph, int be);
38 int be);
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/serial/ |
| H A D | omap_serial.txt | 4 - compatible : should be "ti,omap2-uart" for OMAP2 controllers
5 - compatible : should be "ti,omap3-uart" for OMAP3 controllers
6 - compatible : should be "ti,omap4-uart" for OMAP4 controllers
7 - compatible : should be "ti,am4372-uart" for AM437x controllers
8 - compatible : should be "ti,am3352-uart" for AM335x controllers
9 - compatible : should be "ti,dra742-uart" for DRA7x controllers
15 - ti,hwmods : Must be "uart<n>", n being the instance number (1-based)
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| /rk3399_rockchip-uboot/drivers/power/ |
| H A D | Kconfig | 126 On A10(s) / A13 / A20 boards dcdc2 is VDD-CPU and should be 1.4V.
127 On A31 boards dcdc2 is used for VDD-GPU and should be 1.2V.
128 On A23/A33 boards dcdc2 is used for VDD-SYS and should be 1.1V.
129 On A80 boards dcdc2 powers the GPU and can be left off.
130 On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V.
131 On R40 boards dcdc2 is VDD-CPU and should be 1.1V
145 should be 1.25V.
146 On A10s boards with an axp152 dcdc3 is VCC-DRAM and should be 1.5V.
147 On A23 / A31 / A33 boards dcdc3 is VDD-CPU and should be 1.2V.
148 On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V.
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| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | Kconfig | 31 Enable the Altera SPI driver. This driver can be used to
39 Enable the Andestech ATCSPI200 SPI driver. This driver can be
57 many AT91 (ARM) chips. This driver can be used to access
64 Enable the BCM6328 HSSPI driver. This driver can be used to
72 Enable the BCM6348/BCM6358 SPI driver. This driver can be used to
80 be used to access the SPI flash on platforms embedding this
86 Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
93 Enable the Designware SPI driver. This driver can be used to
100 Enable the Samsung Exynos SPI driver. This driver can be used to
107 Enable the Freescale DSPI driver. This driver can be used to
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/gpio/ |
| H A D | gpio-samsung.txt | 4 - compatible: Compatible property value should be "samsung,exynos4-gpio>".
9 - #gpio-cells: Should be 4. The syntax of the gpio specifier used by client nodes
10 should be the following with values derived from the SoC user manual.
29 - #address-cells: should be 1.
30 - #size-cells: should be 1.
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| /rk3399_rockchip-uboot/include/configs/ |
| H A D | bcm_ep_board.h | 19 #error CONFIG_SYS_TEXT_BASE must be defined!
22 #error CONFIG_SYS_SDRAM_BASE must be defined!
25 #error CONFIG_SYS_SDRAM_SIZE must be defined!
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/usb/ |
| H A D | tegra-usb.txt | 9 - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
11 - phy_type : Should be one of "ulpi" or "utmi".
12 - nvidia,vbus-gpio : If present, specifies a gpio that needs to be
13 activated for the bus to be powered.
17 nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral",
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| /rk3399_rockchip-uboot/board/Barix/ipam390/ |
| H A D | ipam390-ais-uart.cfg | 1 ; General settings that can be overwritten in the host code
5 ; Can be 8 or 16 - used in emifa
19 ; can also be chosen for internal or external.
57 ; This section can be used to configure the PLL1 and the EMIF3a registers
79 ; This section can be used to configure the EMIFA to use
95 ; This section can be used to configure the async chip selects
117 ; This section should be used in place of PLL0CONFIG when
131 ; This section should be used to setup the power state of modules
132 ; of the two PSCs. This section can be included multiple times to
140 ; This section can be included multiple times to allow setting
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| /rk3399_rockchip-uboot/drivers/sysreset/ |
| H A D | Kconfig | 11 Enable system reset drivers which can be used to reset the CPU or
12 board. Each driver can provide a reset method which will be called
20 Enable system reset drivers which can be used to reset the CPU or
21 board. Each driver can provide a reset method which will be called
29 Enable system reset drivers which can be used to reset the CPU or
30 board. Each driver can provide a reset method which will be called
52 must be running on your system.
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/exynos/ |
| H A D | dwmmc.txt | 14 - compatible: should be
24 - #address-cells: should be 1.
25 - #size-cells: should be 0.
29 - samsung,timing: The timing values to be written into the
52 cannot be removed (always present) or it is a removable device.
54 0 - Indicates that the device cannot be removed.
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