Searched refs:__ilog2_u64 (Results 1 – 9 of 9) sorted by relevance
24 law_sz_enc = __ilog2_u64(law_sz) - 1; in set_ddr_laws()35 law_sz = 1ull << __ilog2_u64(law_sz); in set_ddr_laws()44 law_sz_enc = __ilog2_u64(law_sz) - 1; in set_ddr_laws()
35 int __ilog2_u64(u64 n) in __ilog2_u64() function154 __ilog2_u64(n) \
51 u32 sz = (__ilog2_u64(size) - 1); in set_inbound_window()107 pci_sz = 1ull << __ilog2_u64(sz); in fsl_pci_setup_inbound_windows()124 sz = 2ull << __ilog2_u64(sz); in fsl_pci_setup_inbound_windows()140 pci_sz = 1ull << __ilog2_u64(sz); in fsl_pci_setup_inbound_windows()159 pci_sz = 1ull << __ilog2_u64(gd->ram_size); in fsl_pci_setup_inbound_windows()162 pci_sz = 1ull << (__ilog2_u64(gd->ram_size) + 1); in fsl_pci_setup_inbound_windows()175 pci_sz = 1ull << __ilog2_u64(sz); in fsl_pci_setup_inbound_windows()210 u32 sz_inbound = __ilog2_u64(CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE) in fsl_pcie_boot_master()243 sz_inbound = __ilog2_u64(CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE) in fsl_pcie_boot_master()335 u32 sz = (__ilog2_u64((u64)hose->regions[r].size) - 1); in fsl_pci_init()
40 #define atmu_size_mask(sz) (__ilog2_u64(sz) - 1)
48 #define law_size_bits(sz) (__ilog2_u64(sz) - 1)
218 (u32)((((1ull << __ilog2_u64((u64)x)) / (128 * 1024)) - 1) * 4)
193 law_sz_enc = __ilog2_u64(law_sz) - 1; in set_ddr_laws()199 law_sz = 1ull << __ilog2_u64(law_sz); in set_ddr_laws()208 law_sz_enc = __ilog2_u64(law_sz) - 1; in set_ddr_laws()
21 return __ilog2_u64(val); in __ilog2_roundup_64()23 return __ilog2_u64(val) + 1; in __ilog2_roundup_64()151 int size_shift = __ilog2_u64(subwin_size); in pamu_config_spaace()
273 u32 camsize = __ilog2_u64(size) & tsize_mask; in tlb_map_range()