1f698e9f3SAneesh Bansal /*
2f698e9f3SAneesh Bansal * FSL PAMU driver
3f698e9f3SAneesh Bansal *
4f698e9f3SAneesh Bansal * Copyright 2012-2016 Freescale Semiconductor, Inc.
5f698e9f3SAneesh Bansal *
6f698e9f3SAneesh Bansal * SPDX-License-Identifier: GPL-2.0+
7f698e9f3SAneesh Bansal */
8f698e9f3SAneesh Bansal
9f698e9f3SAneesh Bansal #include <common.h>
10f698e9f3SAneesh Bansal #include <linux/log2.h>
11f698e9f3SAneesh Bansal #include <malloc.h>
12f698e9f3SAneesh Bansal #include <asm/fsl_pamu.h>
13f698e9f3SAneesh Bansal
14f698e9f3SAneesh Bansal struct paace *ppaact;
15f698e9f3SAneesh Bansal struct paace *sec;
16f698e9f3SAneesh Bansal unsigned long fspi;
17f698e9f3SAneesh Bansal
__ilog2_roundup_64(uint64_t val)18f698e9f3SAneesh Bansal static inline int __ilog2_roundup_64(uint64_t val)
19f698e9f3SAneesh Bansal {
20f698e9f3SAneesh Bansal if ((val & (val - 1)) == 0)
21f698e9f3SAneesh Bansal return __ilog2_u64(val);
22f698e9f3SAneesh Bansal else
23f698e9f3SAneesh Bansal return __ilog2_u64(val) + 1;
24f698e9f3SAneesh Bansal }
25f698e9f3SAneesh Bansal
26f698e9f3SAneesh Bansal
count_lsb_zeroes(unsigned long val)27f698e9f3SAneesh Bansal static inline int count_lsb_zeroes(unsigned long val)
28f698e9f3SAneesh Bansal {
29f698e9f3SAneesh Bansal return ffs(val) - 1;
30f698e9f3SAneesh Bansal }
31f698e9f3SAneesh Bansal
map_addrspace_size_to_wse(uint64_t addrspace_size)32f698e9f3SAneesh Bansal static unsigned int map_addrspace_size_to_wse(uint64_t addrspace_size)
33f698e9f3SAneesh Bansal {
34f698e9f3SAneesh Bansal /* window size is 2^(WSE+1) bytes */
35f698e9f3SAneesh Bansal return count_lsb_zeroes(addrspace_size >> PAMU_PAGE_SHIFT) +
36f698e9f3SAneesh Bansal PAMU_PAGE_SHIFT - 1;
37f698e9f3SAneesh Bansal }
38f698e9f3SAneesh Bansal
map_subwindow_cnt_to_wce(uint32_t subwindow_cnt)39f698e9f3SAneesh Bansal static unsigned int map_subwindow_cnt_to_wce(uint32_t subwindow_cnt)
40f698e9f3SAneesh Bansal {
41f698e9f3SAneesh Bansal /* window count is 2^(WCE+1) bytes */
42f698e9f3SAneesh Bansal return count_lsb_zeroes(subwindow_cnt) - 1;
43f698e9f3SAneesh Bansal }
44f698e9f3SAneesh Bansal
pamu_setup_default_xfer_to_host_ppaace(struct paace * ppaace)45f698e9f3SAneesh Bansal static void pamu_setup_default_xfer_to_host_ppaace(struct paace *ppaace)
46f698e9f3SAneesh Bansal {
47f698e9f3SAneesh Bansal set_bf(ppaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_PRIMARY);
48f698e9f3SAneesh Bansal set_bf(ppaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
49f698e9f3SAneesh Bansal PAACE_M_COHERENCE_REQ);
50f698e9f3SAneesh Bansal }
51f698e9f3SAneesh Bansal
pamu_setup_default_xfer_to_host_spaace(struct paace * spaace)52f698e9f3SAneesh Bansal static void pamu_setup_default_xfer_to_host_spaace(struct paace *spaace)
53f698e9f3SAneesh Bansal {
54f698e9f3SAneesh Bansal set_bf(spaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_SECONDARY);
55f698e9f3SAneesh Bansal set_bf(spaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
56f698e9f3SAneesh Bansal PAACE_M_COHERENCE_REQ);
57f698e9f3SAneesh Bansal }
58f698e9f3SAneesh Bansal
59f698e9f3SAneesh Bansal /** Sets up PPAACE entry for specified liodn
60f698e9f3SAneesh Bansal *
61f698e9f3SAneesh Bansal * @param[in] liodn Logical IO device number
62f698e9f3SAneesh Bansal * @param[in] win_addr starting address of DSA window
63f698e9f3SAneesh Bansal * @param[in] win-size size of DSA window
64f698e9f3SAneesh Bansal * @param[in] omi Operation mapping index -- if ~omi == 0 then omi
65f698e9f3SAneesh Bansal not defined
66f698e9f3SAneesh Bansal * @param[in] stashid cache stash id for associated cpu -- if ~stashid == 0
67f698e9f3SAneesh Bansal then stashid not defined
68f698e9f3SAneesh Bansal * @param[in] snoopid snoop id for hardware coherency -- if ~snoopid == 0
69f698e9f3SAneesh Bansal then snoopid not defined
70f698e9f3SAneesh Bansal * @param[in] subwin_cnt number of sub-windows
71f698e9f3SAneesh Bansal *
72f698e9f3SAneesh Bansal * @return Returns 0 upon success else error code < 0 returned
73f698e9f3SAneesh Bansal */
pamu_config_ppaace(uint32_t liodn,uint64_t win_addr,uint64_t win_size,uint32_t omi,uint32_t snoopid,uint32_t stashid,uint32_t subwin_cnt)74f698e9f3SAneesh Bansal static int pamu_config_ppaace(uint32_t liodn, uint64_t win_addr,
75f698e9f3SAneesh Bansal uint64_t win_size, uint32_t omi,
76f698e9f3SAneesh Bansal uint32_t snoopid, uint32_t stashid,
77f698e9f3SAneesh Bansal uint32_t subwin_cnt)
78f698e9f3SAneesh Bansal {
79f698e9f3SAneesh Bansal struct paace *ppaace;
80f698e9f3SAneesh Bansal
81f698e9f3SAneesh Bansal if ((win_size & (win_size - 1)) || win_size < PAMU_PAGE_SIZE)
82f698e9f3SAneesh Bansal return -1;
83f698e9f3SAneesh Bansal
84f698e9f3SAneesh Bansal if (win_addr & (win_size - 1))
85f698e9f3SAneesh Bansal return -2;
86f698e9f3SAneesh Bansal
87f698e9f3SAneesh Bansal if (liodn > NUM_PPAACT_ENTRIES) {
88f698e9f3SAneesh Bansal printf("Entries in PPACT not sufficient\n");
89f698e9f3SAneesh Bansal return -3;
90f698e9f3SAneesh Bansal }
91f698e9f3SAneesh Bansal
92f698e9f3SAneesh Bansal ppaace = &ppaact[liodn];
93f698e9f3SAneesh Bansal
94f698e9f3SAneesh Bansal /* window size is 2^(WSE+1) bytes */
95f698e9f3SAneesh Bansal set_bf(ppaace->addr_bitfields, PPAACE_AF_WSE,
96f698e9f3SAneesh Bansal map_addrspace_size_to_wse(win_size));
97f698e9f3SAneesh Bansal
98f698e9f3SAneesh Bansal pamu_setup_default_xfer_to_host_ppaace(ppaace);
99f698e9f3SAneesh Bansal
100f698e9f3SAneesh Bansal if (sizeof(phys_addr_t) > 4)
101f698e9f3SAneesh Bansal ppaace->wbah = (u64)win_addr >> (PAMU_PAGE_SHIFT + 20);
102f698e9f3SAneesh Bansal else
103f698e9f3SAneesh Bansal ppaace->wbah = 0;
104f698e9f3SAneesh Bansal
105f698e9f3SAneesh Bansal set_bf(ppaace->addr_bitfields, PPAACE_AF_WBAL,
106f698e9f3SAneesh Bansal (win_addr >> PAMU_PAGE_SHIFT));
107f698e9f3SAneesh Bansal
108f698e9f3SAneesh Bansal /* set up operation mapping if it's configured */
109f698e9f3SAneesh Bansal if (omi < OME_NUMBER_ENTRIES) {
110f698e9f3SAneesh Bansal set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED);
111f698e9f3SAneesh Bansal ppaace->op_encode.index_ot.omi = omi;
112f698e9f3SAneesh Bansal } else if (~omi != 0) {
113f698e9f3SAneesh Bansal return -3;
114f698e9f3SAneesh Bansal }
115f698e9f3SAneesh Bansal
116f698e9f3SAneesh Bansal /* configure stash id */
117f698e9f3SAneesh Bansal if (~stashid != 0)
118f698e9f3SAneesh Bansal set_bf(ppaace->impl_attr, PAACE_IA_CID, stashid);
119f698e9f3SAneesh Bansal
120f698e9f3SAneesh Bansal /* configure snoop id */
121f698e9f3SAneesh Bansal if (~snoopid != 0)
122f698e9f3SAneesh Bansal ppaace->domain_attr.to_host.snpid = snoopid;
123f698e9f3SAneesh Bansal
124f698e9f3SAneesh Bansal if (subwin_cnt) {
125f698e9f3SAneesh Bansal /* window count is 2^(WCE+1) bytes */
126f698e9f3SAneesh Bansal set_bf(ppaace->impl_attr, PAACE_IA_WCE,
127f698e9f3SAneesh Bansal map_subwindow_cnt_to_wce(subwin_cnt));
128f698e9f3SAneesh Bansal set_bf(ppaace->addr_bitfields, PPAACE_AF_MW, 0x1);
129f698e9f3SAneesh Bansal ppaace->fspi = fspi;
130f698e9f3SAneesh Bansal fspi = fspi + DEFAULT_NUM_SUBWINDOWS - 1;
131f698e9f3SAneesh Bansal } else {
132f698e9f3SAneesh Bansal set_bf(ppaace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
133f698e9f3SAneesh Bansal }
134f698e9f3SAneesh Bansal
135f698e9f3SAneesh Bansal asm volatile("sync" : : : "memory");
136f698e9f3SAneesh Bansal /* Mark the ppace entry valid */
137f698e9f3SAneesh Bansal ppaace->addr_bitfields |= PAACE_V_VALID;
138f698e9f3SAneesh Bansal asm volatile("sync" : : : "memory");
139f698e9f3SAneesh Bansal
140f698e9f3SAneesh Bansal return 0;
141f698e9f3SAneesh Bansal }
142f698e9f3SAneesh Bansal
pamu_config_spaace(uint32_t liodn,uint64_t subwin_size,uint64_t subwin_addr,uint64_t size,uint32_t omi,uint32_t snoopid,uint32_t stashid)143f698e9f3SAneesh Bansal static int pamu_config_spaace(uint32_t liodn,
144f698e9f3SAneesh Bansal uint64_t subwin_size, uint64_t subwin_addr, uint64_t size,
145f698e9f3SAneesh Bansal uint32_t omi, uint32_t snoopid, uint32_t stashid)
146f698e9f3SAneesh Bansal {
147f698e9f3SAneesh Bansal struct paace *paace;
148f698e9f3SAneesh Bansal /* Align start addr of subwin to subwindoe size */
149f698e9f3SAneesh Bansal uint64_t sec_addr = subwin_addr & ~(subwin_size - 1);
150f698e9f3SAneesh Bansal uint64_t end_addr = subwin_addr + size;
151f698e9f3SAneesh Bansal int size_shift = __ilog2_u64(subwin_size);
152f698e9f3SAneesh Bansal uint64_t win_size = 0;
153f698e9f3SAneesh Bansal uint32_t index, swse;
154f698e9f3SAneesh Bansal unsigned long fspi_idx;
155f698e9f3SAneesh Bansal
156f698e9f3SAneesh Bansal /* Recalculate the size */
157f698e9f3SAneesh Bansal size = end_addr - sec_addr;
158f698e9f3SAneesh Bansal
159f698e9f3SAneesh Bansal if (!subwin_size)
160f698e9f3SAneesh Bansal return -1;
161f698e9f3SAneesh Bansal
162f698e9f3SAneesh Bansal if (liodn > NUM_PPAACT_ENTRIES) {
163f698e9f3SAneesh Bansal printf("LIODN No programmed %d > no. of PPAACT entries %d\n",
164f698e9f3SAneesh Bansal liodn, NUM_PPAACT_ENTRIES);
165f698e9f3SAneesh Bansal return -1;
166f698e9f3SAneesh Bansal }
167f698e9f3SAneesh Bansal
168f698e9f3SAneesh Bansal while (sec_addr < end_addr) {
169f698e9f3SAneesh Bansal debug("sec_addr < end_addr is %llx < %llx\n", sec_addr,
170f698e9f3SAneesh Bansal end_addr);
171f698e9f3SAneesh Bansal paace = &ppaact[liodn];
172f698e9f3SAneesh Bansal if (!paace)
173f698e9f3SAneesh Bansal return -1;
174f698e9f3SAneesh Bansal fspi_idx = paace->fspi;
175f698e9f3SAneesh Bansal
176f698e9f3SAneesh Bansal /* Calculating the win_size here as if we map in index 0,
177f698e9f3SAneesh Bansal paace entry woudl need to be programmed for SWSE */
178f698e9f3SAneesh Bansal win_size = end_addr - sec_addr;
179f698e9f3SAneesh Bansal win_size = 1 << __ilog2_roundup_64(win_size);
180f698e9f3SAneesh Bansal
181f698e9f3SAneesh Bansal if (win_size > subwin_size)
182f698e9f3SAneesh Bansal win_size = subwin_size;
183f698e9f3SAneesh Bansal else if (win_size < PAMU_PAGE_SIZE)
184f698e9f3SAneesh Bansal win_size = PAMU_PAGE_SIZE;
185f698e9f3SAneesh Bansal
186f698e9f3SAneesh Bansal debug("win_size is %llx\n", win_size);
187f698e9f3SAneesh Bansal
188f698e9f3SAneesh Bansal swse = map_addrspace_size_to_wse(win_size);
189f698e9f3SAneesh Bansal index = sec_addr >> size_shift;
190f698e9f3SAneesh Bansal
191f698e9f3SAneesh Bansal if (index == 0) {
192f698e9f3SAneesh Bansal set_bf(paace->win_bitfields, PAACE_WIN_SWSE, swse);
193f698e9f3SAneesh Bansal set_bf(paace->addr_bitfields, PAACE_AF_AP,
194f698e9f3SAneesh Bansal PAACE_AP_PERMS_ALL);
195f698e9f3SAneesh Bansal sec_addr += subwin_size;
196f698e9f3SAneesh Bansal continue;
197f698e9f3SAneesh Bansal }
198f698e9f3SAneesh Bansal
199f698e9f3SAneesh Bansal paace = sec + fspi_idx + index - 1;
200f698e9f3SAneesh Bansal
201f698e9f3SAneesh Bansal debug("SPAACT:Writing at location %p, index %d\n", paace,
202f698e9f3SAneesh Bansal index);
203f698e9f3SAneesh Bansal
204f698e9f3SAneesh Bansal pamu_setup_default_xfer_to_host_spaace(paace);
205f698e9f3SAneesh Bansal set_bf(paace->addr_bitfields, SPAACE_AF_LIODN, liodn);
206f698e9f3SAneesh Bansal set_bf(paace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
207f698e9f3SAneesh Bansal
208f698e9f3SAneesh Bansal /* configure snoop id */
209f698e9f3SAneesh Bansal if (~snoopid != 0)
210f698e9f3SAneesh Bansal paace->domain_attr.to_host.snpid = snoopid;
211f698e9f3SAneesh Bansal
212f698e9f3SAneesh Bansal if (paace->addr_bitfields & PAACE_V_VALID) {
213f698e9f3SAneesh Bansal debug("Reached overlap condition\n");
214f698e9f3SAneesh Bansal debug("%d < %d\n", get_bf(paace->win_bitfields,
215f698e9f3SAneesh Bansal PAACE_WIN_SWSE), swse);
216f698e9f3SAneesh Bansal if (get_bf(paace->win_bitfields, PAACE_WIN_SWSE) < swse)
217f698e9f3SAneesh Bansal set_bf(paace->win_bitfields, PAACE_WIN_SWSE,
218f698e9f3SAneesh Bansal swse);
219f698e9f3SAneesh Bansal } else {
220f698e9f3SAneesh Bansal set_bf(paace->win_bitfields, PAACE_WIN_SWSE, swse);
221f698e9f3SAneesh Bansal }
222f698e9f3SAneesh Bansal
223f698e9f3SAneesh Bansal paace->addr_bitfields |= PAACE_V_VALID;
224f698e9f3SAneesh Bansal sec_addr += subwin_size;
225f698e9f3SAneesh Bansal }
226f698e9f3SAneesh Bansal
227f698e9f3SAneesh Bansal return 0;
228f698e9f3SAneesh Bansal }
229f698e9f3SAneesh Bansal
pamu_init(void)230f698e9f3SAneesh Bansal int pamu_init(void)
231f698e9f3SAneesh Bansal {
232f698e9f3SAneesh Bansal u32 base_addr = CONFIG_SYS_PAMU_ADDR;
233f698e9f3SAneesh Bansal struct ccsr_pamu *regs;
234f698e9f3SAneesh Bansal u32 i = 0;
235f698e9f3SAneesh Bansal u64 ppaact_phys, ppaact_lim, ppaact_size;
236f698e9f3SAneesh Bansal u64 spaact_phys, spaact_lim, spaact_size;
237f698e9f3SAneesh Bansal
238f698e9f3SAneesh Bansal ppaact_size = sizeof(struct paace) * NUM_PPAACT_ENTRIES;
239f698e9f3SAneesh Bansal spaact_size = sizeof(struct paace) * NUM_SPAACT_ENTRIES;
240f698e9f3SAneesh Bansal
241f698e9f3SAneesh Bansal /* Allocate space for Primary PAACT Table */
242*8f01397bSSumit Garg #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_PPAACT_ADDR))
243*8f01397bSSumit Garg ppaact = (void *)CONFIG_SPL_PPAACT_ADDR;
244*8f01397bSSumit Garg #else
245f698e9f3SAneesh Bansal ppaact = memalign(PAMU_TABLE_ALIGNMENT, ppaact_size);
246f698e9f3SAneesh Bansal if (!ppaact)
247f698e9f3SAneesh Bansal return -1;
248*8f01397bSSumit Garg #endif
249f698e9f3SAneesh Bansal memset(ppaact, 0, ppaact_size);
250f698e9f3SAneesh Bansal
251f698e9f3SAneesh Bansal /* Allocate space for Secondary PAACT Table */
252*8f01397bSSumit Garg #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SPAACT_ADDR))
253*8f01397bSSumit Garg sec = (void *)CONFIG_SPL_SPAACT_ADDR;
254*8f01397bSSumit Garg #else
255f698e9f3SAneesh Bansal sec = memalign(PAMU_TABLE_ALIGNMENT, spaact_size);
256f698e9f3SAneesh Bansal if (!sec)
257f698e9f3SAneesh Bansal return -1;
258*8f01397bSSumit Garg #endif
259f698e9f3SAneesh Bansal memset(sec, 0, spaact_size);
260f698e9f3SAneesh Bansal
261f698e9f3SAneesh Bansal ppaact_phys = virt_to_phys((void *)ppaact);
262f698e9f3SAneesh Bansal ppaact_lim = ppaact_phys + ppaact_size;
263f698e9f3SAneesh Bansal
264f698e9f3SAneesh Bansal spaact_phys = (uint64_t)virt_to_phys((void *)sec);
265f698e9f3SAneesh Bansal spaact_lim = spaact_phys + spaact_size;
266f698e9f3SAneesh Bansal
267f698e9f3SAneesh Bansal /* Configure all PAMU's */
268f698e9f3SAneesh Bansal for (i = 0; i < CONFIG_NUM_PAMU; i++) {
269f698e9f3SAneesh Bansal regs = (struct ccsr_pamu *)base_addr;
270f698e9f3SAneesh Bansal
271f698e9f3SAneesh Bansal out_be32(®s->ppbah, ppaact_phys >> 32);
272f698e9f3SAneesh Bansal out_be32(®s->ppbal, (uint32_t)ppaact_phys);
273f698e9f3SAneesh Bansal
274f698e9f3SAneesh Bansal out_be32(®s->pplah, (ppaact_lim) >> 32);
275f698e9f3SAneesh Bansal out_be32(®s->pplal, (uint32_t)ppaact_lim);
276f698e9f3SAneesh Bansal
277f698e9f3SAneesh Bansal if (sec != NULL) {
278f698e9f3SAneesh Bansal out_be32(®s->spbah, spaact_phys >> 32);
279f698e9f3SAneesh Bansal out_be32(®s->spbal, (uint32_t)spaact_phys);
280f698e9f3SAneesh Bansal out_be32(®s->splah, spaact_lim >> 32);
281f698e9f3SAneesh Bansal out_be32(®s->splal, (uint32_t)spaact_lim);
282f698e9f3SAneesh Bansal }
283f698e9f3SAneesh Bansal asm volatile("sync" : : : "memory");
284f698e9f3SAneesh Bansal
285f698e9f3SAneesh Bansal base_addr += PAMU_OFFSET;
286f698e9f3SAneesh Bansal }
287f698e9f3SAneesh Bansal
288f698e9f3SAneesh Bansal return 0;
289f698e9f3SAneesh Bansal }
290f698e9f3SAneesh Bansal
pamu_enable(void)291f698e9f3SAneesh Bansal void pamu_enable(void)
292f698e9f3SAneesh Bansal {
293f698e9f3SAneesh Bansal u32 i = 0;
294f698e9f3SAneesh Bansal u32 base_addr = CONFIG_SYS_PAMU_ADDR;
295f698e9f3SAneesh Bansal for (i = 0; i < CONFIG_NUM_PAMU; i++) {
296f698e9f3SAneesh Bansal setbits_be32((void *)base_addr + PAMU_PCR_OFFSET,
297f698e9f3SAneesh Bansal PAMU_PCR_PE);
298f698e9f3SAneesh Bansal asm volatile("sync" : : : "memory");
299f698e9f3SAneesh Bansal base_addr += PAMU_OFFSET;
300f698e9f3SAneesh Bansal }
301f698e9f3SAneesh Bansal }
302f698e9f3SAneesh Bansal
pamu_reset(void)303f698e9f3SAneesh Bansal void pamu_reset(void)
304f698e9f3SAneesh Bansal {
305f698e9f3SAneesh Bansal u32 i = 0;
306f698e9f3SAneesh Bansal u32 base_addr = CONFIG_SYS_PAMU_ADDR;
307f698e9f3SAneesh Bansal struct ccsr_pamu *regs;
308f698e9f3SAneesh Bansal
309f698e9f3SAneesh Bansal for (i = 0; i < CONFIG_NUM_PAMU; i++) {
310f698e9f3SAneesh Bansal regs = (struct ccsr_pamu *)base_addr;
311f698e9f3SAneesh Bansal /* Clear PPAACT Base register */
312f698e9f3SAneesh Bansal out_be32(®s->ppbah, 0);
313f698e9f3SAneesh Bansal out_be32(®s->ppbal, 0);
314f698e9f3SAneesh Bansal out_be32(®s->pplah, 0);
315f698e9f3SAneesh Bansal out_be32(®s->pplal, 0);
316f698e9f3SAneesh Bansal out_be32(®s->spbah, 0);
317f698e9f3SAneesh Bansal out_be32(®s->spbal, 0);
318f698e9f3SAneesh Bansal out_be32(®s->splah, 0);
319f698e9f3SAneesh Bansal out_be32(®s->splal, 0);
320f698e9f3SAneesh Bansal
321f698e9f3SAneesh Bansal clrbits_be32((void *)regs + PAMU_PCR_OFFSET, PAMU_PCR_PE);
322f698e9f3SAneesh Bansal asm volatile("sync" : : : "memory");
323f698e9f3SAneesh Bansal base_addr += PAMU_OFFSET;
324f698e9f3SAneesh Bansal }
325f698e9f3SAneesh Bansal }
326f698e9f3SAneesh Bansal
pamu_disable(void)327f698e9f3SAneesh Bansal void pamu_disable(void)
328f698e9f3SAneesh Bansal {
329f698e9f3SAneesh Bansal u32 i = 0;
330f698e9f3SAneesh Bansal u32 base_addr = CONFIG_SYS_PAMU_ADDR;
331f698e9f3SAneesh Bansal
332f698e9f3SAneesh Bansal
333f698e9f3SAneesh Bansal for (i = 0; i < CONFIG_NUM_PAMU; i++) {
334f698e9f3SAneesh Bansal clrbits_be32((void *)base_addr + PAMU_PCR_OFFSET, PAMU_PCR_PE);
335f698e9f3SAneesh Bansal asm volatile("sync" : : : "memory");
336f698e9f3SAneesh Bansal base_addr += PAMU_OFFSET;
337f698e9f3SAneesh Bansal }
338f698e9f3SAneesh Bansal }
339f698e9f3SAneesh Bansal
340f698e9f3SAneesh Bansal
find_max(uint64_t arr[],int num)341f698e9f3SAneesh Bansal static uint64_t find_max(uint64_t arr[], int num)
342f698e9f3SAneesh Bansal {
343f698e9f3SAneesh Bansal int i = 0;
344f698e9f3SAneesh Bansal int max = 0;
345f698e9f3SAneesh Bansal for (i = 1 ; i < num; i++)
346f698e9f3SAneesh Bansal if (arr[max] < arr[i])
347f698e9f3SAneesh Bansal max = i;
348f698e9f3SAneesh Bansal
349f698e9f3SAneesh Bansal return arr[max];
350f698e9f3SAneesh Bansal }
351f698e9f3SAneesh Bansal
find_min(uint64_t arr[],int num)352f698e9f3SAneesh Bansal static uint64_t find_min(uint64_t arr[], int num)
353f698e9f3SAneesh Bansal {
354f698e9f3SAneesh Bansal int i = 0;
355f698e9f3SAneesh Bansal int min = 0;
356f698e9f3SAneesh Bansal for (i = 1 ; i < num; i++)
357f698e9f3SAneesh Bansal if (arr[min] > arr[i])
358f698e9f3SAneesh Bansal min = i;
359f698e9f3SAneesh Bansal
360f698e9f3SAneesh Bansal return arr[min];
361f698e9f3SAneesh Bansal }
362f698e9f3SAneesh Bansal
get_win_cnt(uint64_t size)363f698e9f3SAneesh Bansal static uint32_t get_win_cnt(uint64_t size)
364f698e9f3SAneesh Bansal {
365f698e9f3SAneesh Bansal uint32_t win_cnt = DEFAULT_NUM_SUBWINDOWS;
366f698e9f3SAneesh Bansal
367f698e9f3SAneesh Bansal while (win_cnt && (size/win_cnt) < PAMU_PAGE_SIZE)
368f698e9f3SAneesh Bansal win_cnt >>= 1;
369f698e9f3SAneesh Bansal
370f698e9f3SAneesh Bansal return win_cnt;
371f698e9f3SAneesh Bansal }
372f698e9f3SAneesh Bansal
config_pamu(struct pamu_addr_tbl * tbl,int num_entries,uint32_t liodn)373f698e9f3SAneesh Bansal int config_pamu(struct pamu_addr_tbl *tbl, int num_entries, uint32_t liodn)
374f698e9f3SAneesh Bansal {
375f698e9f3SAneesh Bansal int i = 0;
376f698e9f3SAneesh Bansal int ret = 0;
377f698e9f3SAneesh Bansal uint32_t num_sec_windows = 0;
378f698e9f3SAneesh Bansal uint32_t num_windows = 0;
379f698e9f3SAneesh Bansal uint64_t min_addr, max_addr;
380f698e9f3SAneesh Bansal uint64_t size;
381f698e9f3SAneesh Bansal uint64_t subwin_size;
382f698e9f3SAneesh Bansal int sizebit;
383f698e9f3SAneesh Bansal
384f698e9f3SAneesh Bansal min_addr = find_min(tbl->start_addr, num_entries);
385f698e9f3SAneesh Bansal max_addr = find_max(tbl->end_addr, num_entries);
386f698e9f3SAneesh Bansal size = max_addr - min_addr + 1;
387f698e9f3SAneesh Bansal
388f698e9f3SAneesh Bansal if (!size)
389f698e9f3SAneesh Bansal return -1;
390f698e9f3SAneesh Bansal
391f698e9f3SAneesh Bansal sizebit = __ilog2_roundup_64(size);
392f698e9f3SAneesh Bansal size = 1 << sizebit;
393f698e9f3SAneesh Bansal debug("min start_addr is %llx\n", min_addr);
394f698e9f3SAneesh Bansal debug("max end_addr is %llx\n", max_addr);
395f698e9f3SAneesh Bansal debug("size found is %llx\n", size);
396f698e9f3SAneesh Bansal
397f698e9f3SAneesh Bansal if (size < PAMU_PAGE_SIZE)
398f698e9f3SAneesh Bansal size = PAMU_PAGE_SIZE;
399f698e9f3SAneesh Bansal
400f698e9f3SAneesh Bansal while (1) {
401f698e9f3SAneesh Bansal min_addr = min_addr & ~(size - 1);
402f698e9f3SAneesh Bansal if (min_addr + size > max_addr)
403f698e9f3SAneesh Bansal break;
404f698e9f3SAneesh Bansal size <<= 1;
405f698e9f3SAneesh Bansal if (!size)
406f698e9f3SAneesh Bansal return -1;
407f698e9f3SAneesh Bansal }
408f698e9f3SAneesh Bansal debug("PAACT :Base addr is %llx\n", min_addr);
409f698e9f3SAneesh Bansal debug("PAACT : Size is %llx\n", size);
410f698e9f3SAneesh Bansal num_windows = get_win_cnt(size);
411f698e9f3SAneesh Bansal /* For a single window, no spaact entries are required
412f698e9f3SAneesh Bansal * sec_sub_window count = 0 */
413f698e9f3SAneesh Bansal if (num_windows > 1)
414f698e9f3SAneesh Bansal num_sec_windows = num_windows;
415f698e9f3SAneesh Bansal else
416f698e9f3SAneesh Bansal num_sec_windows = 0;
417f698e9f3SAneesh Bansal
418f698e9f3SAneesh Bansal ret = pamu_config_ppaace(liodn, min_addr,
419f698e9f3SAneesh Bansal size , -1, -1, -1, num_sec_windows);
420f698e9f3SAneesh Bansal
421f698e9f3SAneesh Bansal if (ret < 0)
422f698e9f3SAneesh Bansal return ret;
423f698e9f3SAneesh Bansal
424f698e9f3SAneesh Bansal debug("configured ppace\n");
425f698e9f3SAneesh Bansal
426f698e9f3SAneesh Bansal if (num_sec_windows) {
427f698e9f3SAneesh Bansal subwin_size = size >> count_lsb_zeroes(num_sec_windows);
428f698e9f3SAneesh Bansal debug("subwin_size is %llx\n", subwin_size);
429f698e9f3SAneesh Bansal
430f698e9f3SAneesh Bansal for (i = 0; i < num_entries; i++) {
431f698e9f3SAneesh Bansal ret = pamu_config_spaace(liodn,
432f698e9f3SAneesh Bansal subwin_size, tbl->start_addr[i] - min_addr,
433f698e9f3SAneesh Bansal tbl->size[i], -1, -1, -1);
434f698e9f3SAneesh Bansal
435f698e9f3SAneesh Bansal if (ret < 0)
436f698e9f3SAneesh Bansal return ret;
437f698e9f3SAneesh Bansal }
438f698e9f3SAneesh Bansal }
439f698e9f3SAneesh Bansal
440f698e9f3SAneesh Bansal return ret;
441f698e9f3SAneesh Bansal }
442