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Searched refs:VID_FORMAT_CHG (Results 1 – 6 of 6) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dedp_rk3288.h265 #define VID_FORMAT_CHG (0x1 << 3) macro
/rk3399_rockchip-uboot/arch/arm/mach-exynos/include/mach/
H A Ddp.h301 #define VID_FORMAT_CHG (0x1 << 3) macro
/rk3399_rockchip-uboot/drivers/video/drm/
H A Danalogix_dp.h306 #define VID_FORMAT_CHG (0x1 << 3) macro
H A Danalogix_dp_reg.c897 reg = VSYNC_DET | VID_FORMAT_CHG | VID_CLK_CHG; in analogix_dp_init_video()
/rk3399_rockchip-uboot/drivers/video/rockchip/
H A Drk_edp.c780 writel(VSYNC_DET | VID_FORMAT_CHG | VID_CLK_CHG, in rk_edp_init_video()
/rk3399_rockchip-uboot/drivers/video/exynos/
H A Dexynos_dp_lowlevel.c999 reg = VSYNC_DET | VID_FORMAT_CHG | VID_CLK_CHG; in exynos_dp_init_video()