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/rk3399_rockchip-uboot/drivers/serial/
H A DKconfig12 meaning of either setting the baudrate for the early debug UART
32 In very space-constrained devices even the full UART driver is too
33 large. In this case the debug UART can still be used in some cases.
34 This option enables the full UART in U-Boot, so if is it disabled,
35 the full UART driver will be omitted, thus saving space.
42 In very space-constrained devices even the full UART driver is too
43 large. In this case the debug UART can still be used in some cases.
44 This option enables the full UART in SPL, so if is it disabled,
45 the full UART driver will be omitted, thus saving space.
48 int "UART used for console"
[all …]
H A Dserial_pxa.c178 #define pxa_uart(uart, UART) \ argument
181 return pxa_init_dev(UART##_INDEX); \
186 return pxa_setbrg_dev(UART##_INDEX); \
191 return pxa_putc_dev(UART##_INDEX, c); \
196 return pxa_puts_dev(UART##_INDEX, s); \
201 return pxa_getc_dev(UART##_INDEX); \
206 return pxa_tstc_dev(UART##_INDEX); \
222 #define pxa_uart_multi(uart, UART) \ argument
223 pxa_uart(uart, UART) \
/rk3399_rockchip-uboot/board/congatec/conga-qeval20-qa3-e3845/
H A DREADME2 U-Boot console UART selection:
6 configurations (defconfig files). The only difference is the UART that
7 is used as the U-Boot console UART. The default defconfig file:
13 board (conga-QEVAL). This UART is the one provided with a SubD9
18 provides the U-Boot console on the BayTrail internal legacy UART,
21 RS232 level shifters. So a TTL-USB UART adapter does not work in
23 RS232 level signals of the PC UART via some adapter cable.
/rk3399_rockchip-uboot/arch/arm/
H A DKconfig.debug16 bool "Low-level debugging via 8250 UART"
19 their output to an 8250 UART. You can use this option
20 to provide the parameters for the 8250 UART rather than
41 hex "Physical base address of debug UART"
51 int "Register offset shift for the 8250 debug UART"
56 bool "Use 32-bit accesses for 8250 UART"
61 bool "Enable flow control for 8250 UART"
/rk3399_rockchip-uboot/doc/device-tree-bindings/serial/
H A Daltera_uart.txt1 Altera UART
7 - clock-frequency : frequency of the clock input to the UART
H A Dxilinx_uartlite.txt5 - reg: Should contain UART controller registers location and length.
6 - interrupts: Should contain UART controller interrupts.
H A Dbcm2835-aux-uart.txt1 * BCM283x mini UART
6 - clock: input clock frequency for the UART (used to calculate the baud
H A D8250.txt1 * UART (Universal Asynchronous Receiver/Transmitter)
26 - clock-frequency : the input clock frequency for the UART
32 - current-speed : the current active speed of the UART.
37 accesses to the UART (e.g. TI davinci).
42 - fifo-size: the fifo size of the UART.
H A Dpl01x.txt1 * ARM AMBA Primecell PL011 & PL010 serial UART
6 - clock: input clock frequency for the UART (used to calculate the baud
H A Dqca,ar9330-uart.txt1 * Qualcomm Atheros AR9330 High-Speed UART
12 Each UART port must have an alias correctly numbered in "aliases"
H A Daltera_jtaguart.txt1 Altera JTAG UART
H A Domap_serial.txt1 OMAP UART controller
18 - clock-frequency : frequency of the clock input to the UART
H A Dmicrochip,pic32-uart.txt1 * Microchip PIC32 serial UART
H A Dmxc-serial.txt1 NXP i.MX (MXC) UART
/rk3399_rockchip-uboot/arch/x86/cpu/baytrail/
H A DKconfig31 bool "Enable the SoC integrated legacy UART"
33 There is a legacy UART integrated into the Bay Trail SoC.
35 reason, it is recommended that the UART port be used for
/rk3399_rockchip-uboot/arch/mips/mach-bmips/
H A DKconfig95 ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
106 ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and a
117 ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs,
128 ethernet ports, 3 USB ports, 1 UART, GPIO buttons and LEDs, and
139 ethernet ports, 1 UART, GPIO buttons and LEDs, and a BCM43225
150 ethernet ports, 1 UART, GPIO buttons and LEDs, and a BCM4312
161 ethernet ports, 2 USB ports, 1 UART, GPIO buttons and LEDs, and
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3528/
H A Drk3528.c237 …set_uart_iomux(UART##ID##_RX_M##MODE##_OFFSET, UART##ID##_RX_M##MODE, UART##ID##_RX_M##MODE##_ADDR…
239 …set_uart_iomux(UART##ID##_TX_M##MODE##_OFFSET, UART##ID##_TX_M##MODE, UART##ID##_TX_M##MODE##_ADDR…
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3288/
H A DKconfig40 provide access to display pins, I2C, SPI, UART and GPIOs.
51 access to display pins, I2C, SPI, UART and GPIOs.
60 provide access to display pins, I2C, SPI, UART and GPIOs.
69 provide access to display pins, I2C, SPI, UART and GPIOs.
78 I2C, SPI, UART, GPIOs and fan control.
95 2GB DDR3. Expansion connectors provide access to I2C, SPI, UART,
121 provide access to display pins, I2C, SPI, UART and GPIOs.
139 I2C, SPI, UART, GPIOs.
/rk3399_rockchip-uboot/board/freescale/ls1012afrdm/
H A DREADME30 - UART
31 - UART (Console): UART1 (Without flow control) for console
40 - 24 MHz for SC16IS740IPW SPI to Dual UART bridge
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rv1106/
H A Drv1106.c292 …set_uart_iomux(UART##ID##_RX_M##MODE##_OFFSET, UART##ID##_RX_M##MODE, UART##ID##_RX_M##MODE##_ADDR…
294 …set_uart_iomux(UART##ID##_TX_M##MODE##_OFFSET, UART##ID##_TX_M##MODE, UART##ID##_TX_M##MODE##_ADDR…
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3562/
H A Drk3562.c346 …set_uart_iomux(UART##ID##_RX_M##MODE##_OFFSET, UART##ID##_RX_M##MODE, UART##ID##_RX_M##MODE##_ADDR…
348 …set_uart_iomux(UART##ID##_TX_M##MODE##_OFFSET, UART##ID##_TX_M##MODE, UART##ID##_TX_M##MODE##_ADDR…
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra210/
H A Dpinmux.c90 PIN(UART2_TX_PG0, UARTB, I2S4A, SPDIF, UART),
91 PIN(UART2_RX_PG1, UARTB, I2S4A, SPDIF, UART),
92 PIN(UART2_RTS_PG2, UARTB, I2S4A, RSVD2, UART),
93 PIN(UART2_CTS_PG3, UARTB, I2S4A, RSVD2, UART),
98 PIN(UART4_TX_PI4, UARTD, UART, RSVD2, RSVD3),
99 PIN(UART4_RX_PI5, UARTD, UART, RSVD2, RSVD3),
100 PIN(UART4_RTS_PI6, UARTD, UART, RSVD2, RSVD3),
101 PIN(UART4_CTS_PI7, UARTD, UART, RSVD2, RSVD3),
/rk3399_rockchip-uboot/board/ti/ks2_evm/
H A DREADME31 | |DDR3 |NAND |MSM SRAM |ETH ports |UART |I2C |SPI |
65 - UART boot
70 Texas Instruments code composure studio (CCS) and for UART boot.
173 Load and Run U-Boot on keystone EVMs using UART download
176 Open BMC and regular UART terminals.
178 1. On the regular UART port start xmodem transfer of the u-boot.bin
179 2. Using BMC terminal set the ARM-UART bootmode and reboot the EVM
182 3. When xmodem is complete you should see the U-Boot starts on the UART port
187 Open BMC and regular UART terminals.
/rk3399_rockchip-uboot/board/Barix/ipam390/
H A Dipam390-ais-uart.cfg8 ; SPIMASTER,I2CMASTER,EMIFA,NAND,EMAC,UART,PCI,HPI,USB,MMC_SD,VLYNQ,RAW
9 BootMode=UART
43 ; of the current booting peripheral (I2C, SPI, or UART).
52 ; UART: |------24|------16|-------8|-------0|
118 ; the I2C, SPI, or UART modes are being used. This ensures that
/rk3399_rockchip-uboot/arch/arm/mach-bcm283x/
H A DKconfig55 VideoCore firmware to select the PL011 UART for the console by:
77 mini UART (rather than PL011) for the serial console. This is the
78 default on the RPi 3. To enable the UART console, the following non-
93 mini UART (rather than PL011) for the serial console. This is the
94 default on the RPi 3. To enable the UART console, the following non-

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