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Searched refs:SW_TRAINING_PATTERN_SET_PTN1 (Results 1 – 5 of 5) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dedp_rk3288.h386 #define SW_TRAINING_PATTERN_SET_PTN1 (0x1 << 0) macro
/rk3399_rockchip-uboot/arch/arm/mach-exynos/include/mach/
H A Ddp.h409 #define SW_TRAINING_PATTERN_SET_PTN1 (0x1 << 0) macro
/rk3399_rockchip-uboot/drivers/video/drm/
H A Danalogix_dp.h380 #define SW_TRAINING_PATTERN_SET_PTN1 (0x1 << 0) macro
H A Danalogix_dp_reg.c856 reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN1; in analogix_dp_set_training_pattern()
/rk3399_rockchip-uboot/drivers/video/exynos/
H A Dexynos_dp_lowlevel.c951 reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN1; in exynos_dp_set_training_pattern()