Searched refs:PORT_SCR_CTL (Results 1 – 4 of 4) sorted by relevance
190 writel(0x301, port_mmio + PORT_SCR_CTL); in ahci_link_up()192 writel(0x300, port_mmio + PORT_SCR_CTL); in ahci_link_up()
109 writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i); in ceva_init_sata()
122 writel(0x4, port_mmio + PORT_SCR_CTL); in ahci_link_up()124 writel(0x1, port_mmio + PORT_SCR_CTL); in ahci_link_up()126 writel(0x0, port_mmio + PORT_SCR_CTL); in ahci_link_up()129 writel(0x301, port_mmio + PORT_SCR_CTL); in ahci_link_up()131 writel(0x300, port_mmio + PORT_SCR_CTL); in ahci_link_up()
57 #define PORT_SCR_CTL 0x2c /* SATA phy register: SControl */ macro