PORT_LINK_MODE_1_LANES (reference) in projects: rk3399_rockchip-uboot

Searched refs:PORT_LINK_MODE_1_LANES (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-rockchip/
H A D	spl_pcie_ep_boot.c	`60 #define PORT_LINK_MODE_1_LANES (0x1 << 16) macro 267 val \|= PORT_LINK_MODE_1_LANES; in pcie_link_set_lanes()`
/rk3399_rockchip-uboot/drivers/pci/
H A D	pcie_dw_rockchip.c	`129 #define PORT_LINK_MODE_1_LANES PORT_LINK_MODE(0x1) macro 398 val \|= PORT_LINK_MODE_1_LANES; in rk_pcie_configure()`