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Searched refs:PHY_HS2LP_TIME (Results 1 – 7 of 7) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Drockchip_mipi_dsi.h111 #define PHY_HS2LP_TIME DSI_HOST_BITS(0x09c, 8, 24) macro
/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628_dsi.h126 #define PHY_HS2LP_TIME(x) UPDATE(x, 31, 24) macro
H A Drk628_dsi.c1122 PHY_HS2LP_TIME(0x14) | PHY_LP2HS_TIME(0x10) | in rk628_dsi_bridge_pre_enable()
/rk3399_rockchip-uboot/drivers/video/rockchip/
H A Drk_mipi.c162 rk_mipi_dsi_write(regs, PHY_HS2LP_TIME, 0x14); in rk_mipi_dsi_enable()
/rk3399_rockchip-uboot/drivers/video/drm/
H A Drk618_dsi.c89 #define PHY_HS2LP_TIME(x) UPDATE(x, 31, 24) macro
648 value = PHY_HS2LP_TIME(20) | PHY_LP2HS_TIME(16) | MAX_RD_TIME(10000); in rk618_dsi_pre_enable()
H A Ddw_mipi_dsi2.c85 #define PHY_HS2LP_TIME(x) UPDATE(x, 28, 0) macro
1079 dsi_write(dsi2, DSI2_PHY_HS2LP_MAN_CFG, PHY_HS2LP_TIME(tmp)); in dw_mipi_dsi2_lp2hs_or_hs2lp_cfg()
H A Ddw_mipi_dsi.c152 #define PHY_HS2LP_TIME(lbcc) (((lbcc) & 0xff) << 24) macro
1071 dsi_write(dsi, DSI_PHY_TMR_CFG, PHY_HS2LP_TIME(0x14) in dw_mipi_dsi_dphy_timing_config()