Searched refs:PCIE_LINK_WIDTH_SPEED_CONTROL (Results 1 – 2 of 2) sorted by relevance
65 #define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C macro282 val = readl(dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL); in pcie_link_set_lanes()298 writel(val, dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL); in pcie_link_set_lanes()
125 #define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80c macro364 val = readl(rk_pcie->dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL); in rk_pcie_setup_host()366 writel(val, rk_pcie->dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL); in rk_pcie_setup_host()416 val = readl(pci->dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL); in rk_pcie_configure()432 writel(val, pci->dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL); in rk_pcie_configure()