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Searched refs:OSC (Results 1 – 22 of 22) sorted by relevance

/rk3399_rockchip-uboot/board/silica/pengwyn/
H A Dboard.c70 #define OSC (V_OSCK/1000000) macro
72 266, OSC-1, 1, -1, -1, -1, -1};
74 303, OSC-1, 1, -1, -1, -1, -1};
76 400, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/board/birdland/bav335x/
H A Dboard.c174 #define OSC (V_OSCK/1000000) macro
176 266, OSC-1, 1, -1, -1, -1, -1};
178 303, OSC-1, 1, -1, -1, -1, -1};
180 400, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/board/BuR/brppt1/
H A Dboard.c93 #define OSC (V_OSCK/1000000) macro
94 static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/board/gumstix/pepper/
H A Dboard.c36 #define OSC (V_OSCK/1000000) macro
66 const struct dpll_params dpll_ddr3 = {400, OSC-1, 1, -1, -1, -1, -1};
99 const struct dpll_params dpll_ddr2 = {266, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra114/
H A Dclock.c65 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
71 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
77 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
80 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
83 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC),
86 { CLK(AUDIO), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
89 { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC),
93 CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE),
95 { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC),
/rk3399_rockchip-uboot/arch/arm/mach-omap2/am33xx/
H A Dclock_am33xx.c18 #define OSC (V_OSCK/1000000) macro
56 CONFIG_SYS_MPUCLK, OSC-1, 1, -1, -1, -1, -1};
58 1000, OSC-1, -1, -1, 10, 8, 4};
H A Dchilisom.c160 #define OSC (V_OSCK/1000000) macro
162 400, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra210/
H A Dclock.c77 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
83 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
89 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
92 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC),
95 { CLK(AUDIO), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
98 { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC),
102 CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE),
104 { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC),
119 CLK(SFROM32KHZ), CLK(NONE), CLK(OSC), CLK(NONE),
123 CLK(MEMORY), CLK(NONE), CLK(OSC), CLK(NONE),
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra124/
H A Dclock.c75 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
81 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
87 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
90 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC),
93 { CLK(AUDIO), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
96 { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC),
100 CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE),
102 { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC),
117 CLK(SFROM32KHZ), CLK(NONE), CLK(OSC), CLK(NONE),
121 CLK(MEMORY), CLK(NONE), CLK(OSC), CLK(NONE),
[all …]
/rk3399_rockchip-uboot/board/vscom/baltos/
H A Dboard.c165 #define OSC (V_OSCK/1000000) macro
167 266, OSC-1, 1, -1, -1, -1, -1};
169 303, OSC-1, 1, -1, -1, -1, -1};
171 400, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra30/
H A Dclock.c65 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
71 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
77 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
80 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
83 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC),
86 { CLK(AUDIO), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
89 { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC),
93 CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE),
95 { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC),
/rk3399_rockchip-uboot/board/siemens/common/
H A Dboard.c101 #define OSC (V_OSCK/1000000) macro
103 DDR_PLL_FREQ, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/board/phytec/pcm051/
H A Dboard.c43 #define OSC (V_OSCK/1000000) macro
45 DDR_CLK_MHZ, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/board/BuR/brxre1/
H A Dboard.c88 #define OSC (V_OSCK/1000000) macro
89 const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/board/isee/igep003x/
H A Dboard.c141 #define OSC (V_OSCK/1000000) macro
143 400, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra20/
H A Dclock.c62 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC) },
64 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC) },
66 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC) },
67 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC) },
68 { CLK(PERIPH), CLK(CGENERAL), CLK(XCPU), CLK(OSC) },
69 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC) },
H A Dpinmux.c290 PIN(CDEV1, OSC, PLLA_OUT, PLLM_OUT1, AUDIO_SYNC),
291 PIN(CDEV2, OSC, AHB_CLK, APB_CLK, PLLP_OUT4),
/rk3399_rockchip-uboot/board/bosch/shc/
H A Dboard.c280 #define OSC (V_OSCK/1000000) macro
284 #define MPUPLL_FREF (OSC / (MPUPLL_N + 1))
287 400, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/board/tcl/sl50/
H A Dboard.c88 #define OSC (V_OSCK/1000000) macro
90 400, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/board/siemens/pxm2/
H A Dboard.c131 #define OSC (V_OSCK/1000000) macro
134 720, OSC-1, 1, -1, -1, -1, -1};
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dsun8i-a83t.dtsi130 * This is called "internal OSC" in some places.
/rk3399_rockchip-uboot/
H A DREADME841 CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
3579 Enables the RTC32K OSC on AM33xx based plattforms