Searched refs:MR (Results 1 – 4 of 4) sorted by relevance
| /rk3399_rockchip-uboot/doc/ |
| H A D | README.marubun-pcmcia | 2 U-Boot MARUBUN MR-SHPC-01 PCMCIA controller driver
8 This driver supports MARUBUN MR-SHPC-01.
37 This is MR-SHPC-01 PCMCIA controller base address.
43 This is MR-SHPC-01 memory window base address.
49 This is MR-SHPC-01 attribute window base address.
55 This is MR-SHPC-01 I/O window base address.
|
| /rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 908 #define MR(val, ba, cmd, cs1) \ macro
1158 mmdc0->mdscr = MR(63, 0, 3, cs); in mx6_lpddr2_cfg()
1163 mmdc0->mdscr = MR(val, 0, 3, cs); in mx6_lpddr2_cfg()
1166 mmdc0->mdscr = MR(val, 0, 3, cs); in mx6_lpddr2_cfg()
1169 mmdc0->mdscr = MR(val, 0, 3, cs); in mx6_lpddr2_cfg()
1172 mmdc0->mdscr = MR(val, 0, 3, cs); in mx6_lpddr2_cfg()
1454 debug("MR2 CS%d: 0x%08x\n", cs, (u32)MR(val, 2, 3, cs)); in mx6_ddr3_cfg()
1455 mmdc0->mdscr = MR(val, 2, 3, cs); in mx6_ddr3_cfg()
1457 debug("MR3 CS%d: 0x%08x\n", cs, (u32)MR(0, 3, 3, cs)); in mx6_ddr3_cfg()
1458 mmdc0->mdscr = MR(0, 3, 3, cs); in mx6_ddr3_cfg()
[all …]
|
| /rk3399_rockchip-uboot/drivers/mtd/nand/raw/ |
| H A D | atmel_nand.c | 1168 ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, in atmel_hwecc_nand_init_param()
1173 ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, in atmel_hwecc_nand_init_param()
1178 ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, in atmel_hwecc_nand_init_param()
1183 ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, in atmel_hwecc_nand_init_param()
|
| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | atmel_spi.c | 127 spi_writel(as, MR, as->mr); in spi_claim_bus()
|