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Searched refs:IPU_CONF (Results 1 – 8 of 8) sorted by relevance

/rk3399_rockchip-uboot/board/imx31_phycore/
H A Dlowlevel_init.S33 REG IPU_CONF, IPU_CONF_DI_EN
/rk3399_rockchip-uboot/board/freescale/mx31pdk/
H A Dlowlevel_init.S17 write32 IPU_CONF, IPU_CONF_DI_EN
/rk3399_rockchip-uboot/drivers/video/
H A Dipu_common.c518 debug("IPU_CONF = \t0x%08X\n", __raw_readl(IPU_CONF)); in ipu_dump_registers()
580 ipu_conf = __raw_readl(IPU_CONF); in ipu_init_channel()
640 __raw_writel(ipu_conf, IPU_CONF); in ipu_init_channel()
678 ipu_conf = __raw_readl(IPU_CONF); in ipu_uninit_channel()
726 __raw_writel(ipu_conf, IPU_CONF); in ipu_uninit_channel()
H A Dmx3fb.c735 reg = readl(IPU_CONF) | IPU_CONF_SDC_EN | IPU_CONF_DI_EN; in ll_disp3_enable()
736 writel(reg, IPU_CONF); in ll_disp3_enable()
H A Dipu_regs.h302 #define IPU_CONF (&IPU_CM_REG->conf) macro
/rk3399_rockchip-uboot/board/freescale/mx31ads/
H A Dlowlevel_init.S197 REG IPU_CONF, IPU_CONF_DI_EN /* Switch on Display Interface */
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx35/
H A Dimx-regs.h159 #define IPU_CONF IPU_CTRL_BASE_ADDR macro
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h666 #define IPU_CONF IPU_BASE macro