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Searched refs:HCLK_BUS_PRE (Results 1 – 6 of 6) sorted by relevance

/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3328.c97 RK3328_CLK_DUMP(HCLK_BUS_PRE, "hclk_bus", true),
595 case HCLK_BUS_PRE: in rk3328_bus_get_clk()
633 case HCLK_BUS_PRE: in rk3328_bus_set_clk()
813 case HCLK_BUS_PRE: in rk3328_clk_get_rate()
895 case HCLK_BUS_PRE: in rk3328_clk_set_rate()
1309 rk3328_bus_set_clk(priv, HCLK_BUS_PRE, ACLK_BUS_HZ / 2); in rkclk_init()
H A Dclk_px30.c78 PX30_CLK_DUMP(HCLK_BUS_PRE, "hclk_bus", true),
912 case HCLK_BUS_PRE: in px30_bus_get_clk()
949 case HCLK_BUS_PRE: in px30_bus_set_clk()
1360 case HCLK_BUS_PRE: in px30_clk_get_rate()
1446 case HCLK_BUS_PRE: in px30_clk_set_rate()
1797 hclk_bus_rate = px30_bus_get_clk(cru_priv, HCLK_BUS_PRE); in px30_gpll_set_pmuclk()
1815 px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, hclk_bus_rate / div); in px30_gpll_set_pmuclk()
1833 px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, hclk_bus_rate); in px30_gpll_set_pmuclk()
1928 px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, HCLK_BUS_HZ); in px30_clk_init()
/rk3399_rockchip-uboot/include/dt-bindings/clock/
H A Dpx30-cru.h123 #define HCLK_BUS_PRE 240 macro
H A Drk3328-cru.h189 #define HCLK_BUS_PRE 328 macro
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drk3328.dtsi393 <&cru ACLK_BUS_PRE>, <&cru HCLK_BUS_PRE>,
H A Dpx30.dtsi718 <&cru ACLK_PERI_PRE>, <&cru HCLK_BUS_PRE>,