Searched refs:GPIO4_IOC_BASE (Results 1 – 3 of 3) sorted by relevance
125 #define GPIO4_IOC_BASE 0xFF568000 macro169 #define UART0_RX_M2_ADDR (GPIO4_IOC_BASE)173 #define UART0_TX_M2_ADDR (GPIO4_IOC_BASE)197 #define UART1_RX_M2_ADDR (GPIO4_IOC_BASE + 0x4)201 #define UART1_TX_M2_ADDR (GPIO4_IOC_BASE + 0x4)286 #define UART5_TX_M2_ADDR (GPIO4_IOC_BASE + 0x54)420 writel(0xffff1111, GPIO4_IOC_BASE + GPIO4A_IOMUX_SEL_L); in board_set_iomux()421 writel(0xffff1111, GPIO4_IOC_BASE + GPIO4A_IOMUX_SEL_H); in board_set_iomux()422 writel(0x00ff0011, GPIO4_IOC_BASE + GPIO4B_IOMUX_SEL_L); in board_set_iomux()426 writel(0x0f000700, GPIO4_IOC_BASE + 0x0030); in board_set_iomux()[all …]
80 #define GPIO4_IOC_BASE 0xFF550000 macro93 #define UART0_RX_M0_ADDR (GPIO4_IOC_BASE + 0x94)97 #define UART0_TX_M0_ADDR (GPIO4_IOC_BASE + 0x98)121 #define UART1_RX_M1_ADDR (GPIO4_IOC_BASE + 0x94)125 #define UART1_TX_M1_ADDR (GPIO4_IOC_BASE + 0x94)150 #define UART3_RX_M0_ADDR (GPIO4_IOC_BASE + 0x88)154 #define UART3_TX_M0_ADDR (GPIO4_IOC_BASE + 0x88)159 #define UART3_RX_M1_ADDR (GPIO4_IOC_BASE + 0x8C)163 #define UART3_TX_M1_ADDR (GPIO4_IOC_BASE + 0x90)
150 #define GPIO4_IOC_BASE 0xFF070000 macro184 #define UART1_RX_M1_ADDR (GPIO4_IOC_BASE + 0x64)188 #define UART1_TX_M1_ADDR (GPIO4_IOC_BASE + 0x64)213 #define UART3_RX_M0_ADDR (GPIO4_IOC_BASE + 0x6C)217 #define UART3_TX_M0_ADDR (GPIO4_IOC_BASE + 0x6C)279 #define UART6_RX_M1_ADDR (GPIO4_IOC_BASE + 0x68)283 #define UART6_TX_M1_ADDR (GPIO4_IOC_BASE + 0x64)327 #define UART9_RX_M0_ADDR (GPIO4_IOC_BASE + 0x68)331 #define UART9_TX_M0_ADDR (GPIO4_IOC_BASE + 0x68)