Searched refs:CLK_AUX16MHZ_0_DIV_SHIFT (Results 1 – 2 of 2) sorted by relevance
396 CLK_AUX16MHZ_0_DIV_SHIFT = 0, enumerator397 CLK_AUX16MHZ_0_DIV_MASK = 0xff << CLK_AUX16MHZ_0_DIV_SHIFT,
908 div = (con & CLK_AUX16MHZ_0_DIV_MASK) >> CLK_AUX16MHZ_0_DIV_SHIFT; in rk3588_aux16m_get_clk()934 (div - 1) << CLK_AUX16MHZ_0_DIV_SHIFT); in rk3588_aux16m_set_clk()