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Searched refs:BPLL (Results 1 – 4 of 4) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-exynos/include/mach/
H A Dclk.h16 #define BPLL 5 macro
/rk3399_rockchip-uboot/arch/arm/mach-exynos/
H A Dclock.c126 if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL || in exynos_get_pll_clk()
268 case BPLL: in exynos5_get_pll_clk()
280 if (pllreg == MPLL || pllreg == BPLL) { in exynos5_get_pll_clk()
288 case BPLL: in exynos5_get_pll_clk()
326 case BPLL: in exynos542x_get_pll_clk()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3576.h23 BPLL, enumerator
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3576.c66 [BPLL] = PLL(pll_rk3588, PLL_BPLL, RK3576_PLL_CON(0),
2074 rate = rockchip_pll_get_rate(&rk3576_pll_clks[BPLL], priv->cru, in rk3576_clk_get_rate()
2075 BPLL); in rk3576_clk_get_rate()
2585 rockchip_pll_set_rate(&rk3576_pll_clks[BPLL], priv->cru, in rk3576_clk_probe()
2586 BPLL, LPLL_HZ); in rk3576_clk_probe()