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Searched refs:AR71XX_GPIO_REG_OE (Results 1 – 6 of 6) sorted by relevance

/rk3399_rockchip-uboot/board/qca/ap121/
H A Dap121.c30 val = readl(regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
33 writel(val, regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
/rk3399_rockchip-uboot/board/qca/ap143/
H A Dap143.c30 val = readl(regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
33 writel(val, regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
/rk3399_rockchip-uboot/board/tplink/wdr4300/
H A Dwdr4300.c27 clrbits_be32(gpio_regs + AR71XX_GPIO_REG_OE, BIT(21) | BIT(22)); in wdr4300_usb_start()
48 writel(0x3031b, regs + AR71XX_GPIO_REG_OE); in wdr4300_pinmux_config()
/rk3399_rockchip-uboot/drivers/pinctrl/ath79/
H A Dpinctrl_ar933x.c30 clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE, in pinctrl_ar933x_spi_config()
44 clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE, in pinctrl_ar933x_uart_config()
H A Dpinctrl_qca953x.c30 clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE, in pinctrl_qca953x_spi_config()
56 clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE, in pinctrl_qca953x_uart_config()
/rk3399_rockchip-uboot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h959 #define AR71XX_GPIO_REG_OE 0x00 macro