qca/ap143/ap143.c

a2277cc3SWills Wang/*
a2277cc3SWills Wang * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
a2277cc3SWills Wang *
a2277cc3SWills Wang * SPDX-License-Identifier: GPL-2.0+
a2277cc3SWills Wang */
a2277cc3SWills Wang
a2277cc3SWills Wang#include <common.h>
a2277cc3SWills Wang#include <asm/io.h>
a2277cc3SWills Wang#include <asm/addrspace.h>
a2277cc3SWills Wang#include <asm/types.h>
a2277cc3SWills Wang#include <mach/ar71xx_regs.h>
a2277cc3SWills Wang#include <mach/ddr.h>
*f1b65c98SWills Wang#include <mach/ath79.h>
a2277cc3SWills Wang#include <debug_uart.h>
a2277cc3SWills Wang
a2277cc3SWills WangDECLARE_GLOBAL_DATA_PTR;
a2277cc3SWills Wang
a2277cc3SWills Wang#ifdef CONFIG_DEBUG_UART_BOARD_INIT
a2277cc3SWills Wangvoid board_debug_uart_init(void)
a2277cc3SWills Wang{
a2277cc3SWills Wang	void __iomem *regs;
a2277cc3SWills Wang	u32 val;
a2277cc3SWills Wang
a2277cc3SWills Wang	regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
a2277cc3SWills Wang			   MAP_NOCACHE);
a2277cc3SWills Wang
a2277cc3SWills Wang	/*
a2277cc3SWills Wang	 * GPIO9 as input, GPIO10 as output
a2277cc3SWills Wang	 */
a2277cc3SWills Wang	val = readl(regs + AR71XX_GPIO_REG_OE);
a2277cc3SWills Wang	val |= QCA953X_GPIO(9);
a2277cc3SWills Wang	val &= ~QCA953X_GPIO(10);
a2277cc3SWills Wang	writel(val, regs + AR71XX_GPIO_REG_OE);
a2277cc3SWills Wang
a2277cc3SWills Wang	/*
a2277cc3SWills Wang	 * Enable GPIO10 as UART0_SOUT
a2277cc3SWills Wang	 */
a2277cc3SWills Wang	val = readl(regs + QCA953X_GPIO_REG_OUT_FUNC2);
a2277cc3SWills Wang	val &= ~QCA953X_GPIO_MUX_MASK(16);
a2277cc3SWills Wang	val |= QCA953X_GPIO_OUT_MUX_UART0_SOUT << 16;
a2277cc3SWills Wang	writel(val, regs + QCA953X_GPIO_REG_OUT_FUNC2);
a2277cc3SWills Wang
a2277cc3SWills Wang	/*
a2277cc3SWills Wang	 * Enable GPIO9 as UART0_SIN
a2277cc3SWills Wang	 */
a2277cc3SWills Wang	val = readl(regs + QCA953X_GPIO_REG_IN_ENABLE0);
a2277cc3SWills Wang	val &= ~QCA953X_GPIO_MUX_MASK(8);
a2277cc3SWills Wang	val |= QCA953X_GPIO_IN_MUX_UART0_SIN << 8;
a2277cc3SWills Wang	writel(val, regs + QCA953X_GPIO_REG_IN_ENABLE0);
a2277cc3SWills Wang
a2277cc3SWills Wang	/*
a2277cc3SWills Wang	 * Enable GPIO10 output
a2277cc3SWills Wang	 */
a2277cc3SWills Wang	val = readl(regs + AR71XX_GPIO_REG_OUT);
a2277cc3SWills Wang	val |= QCA953X_GPIO(10);
a2277cc3SWills Wang	writel(val, regs + AR71XX_GPIO_REG_OUT);
a2277cc3SWills Wang}
a2277cc3SWills Wang#endif
a2277cc3SWills Wang
a2277cc3SWills Wangint board_early_init_f(void)
a2277cc3SWills Wang{
a2277cc3SWills Wang	ddr_init();
*f1b65c98SWills Wang	ath79_eth_reset();
a2277cc3SWills Wang	return 0;
a2277cc3SWills Wang}