xref: /rk3399_rockchip-uboot/board/qca/ap121/ap121.c (revision 102d86552abc82818c22b39fdef4b3a280a60643)
16a7b52bcSWills Wang /*
26a7b52bcSWills Wang  * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
36a7b52bcSWills Wang  *
46a7b52bcSWills Wang  * SPDX-License-Identifier: GPL-2.0+
56a7b52bcSWills Wang  */
66a7b52bcSWills Wang 
76a7b52bcSWills Wang #include <common.h>
86a7b52bcSWills Wang #include <asm/io.h>
96a7b52bcSWills Wang #include <asm/addrspace.h>
106a7b52bcSWills Wang #include <asm/types.h>
116a7b52bcSWills Wang #include <mach/ar71xx_regs.h>
126a7b52bcSWills Wang #include <mach/ddr.h>
13*04583c68SWills Wang #include <mach/ath79.h>
146a7b52bcSWills Wang #include <debug_uart.h>
156a7b52bcSWills Wang 
166a7b52bcSWills Wang DECLARE_GLOBAL_DATA_PTR;
176a7b52bcSWills Wang 
186a7b52bcSWills Wang #ifdef CONFIG_DEBUG_UART_BOARD_INIT
board_debug_uart_init(void)196a7b52bcSWills Wang void board_debug_uart_init(void)
206a7b52bcSWills Wang {
216a7b52bcSWills Wang 	void __iomem *regs;
226a7b52bcSWills Wang 	u32 val;
236a7b52bcSWills Wang 
246a7b52bcSWills Wang 	regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
256a7b52bcSWills Wang 			   MAP_NOCACHE);
266a7b52bcSWills Wang 
276a7b52bcSWills Wang 	/*
286a7b52bcSWills Wang 	 * GPIO9 as input, GPIO10 as output
296a7b52bcSWills Wang 	 */
306a7b52bcSWills Wang 	val = readl(regs + AR71XX_GPIO_REG_OE);
316a7b52bcSWills Wang 	val &= ~AR933X_GPIO(9);
326a7b52bcSWills Wang 	val |= AR933X_GPIO(10);
336a7b52bcSWills Wang 	writel(val, regs + AR71XX_GPIO_REG_OE);
346a7b52bcSWills Wang 
356a7b52bcSWills Wang 	/*
366a7b52bcSWills Wang 	 * Enable UART, GPIO9 as UART_SI, GPIO10 as UART_SO
376a7b52bcSWills Wang 	 */
386a7b52bcSWills Wang 	val = readl(regs + AR71XX_GPIO_REG_FUNC);
396a7b52bcSWills Wang 	val |= AR933X_GPIO_FUNC_UART_EN | AR933X_GPIO_FUNC_RES_TRUE;
406a7b52bcSWills Wang 	writel(val, regs + AR71XX_GPIO_REG_FUNC);
416a7b52bcSWills Wang }
426a7b52bcSWills Wang #endif
436a7b52bcSWills Wang 
board_early_init_f(void)446a7b52bcSWills Wang int board_early_init_f(void)
456a7b52bcSWills Wang {
466a7b52bcSWills Wang 	ddr_init();
47*04583c68SWills Wang 	ath79_eth_reset();
486a7b52bcSWills Wang 	return 0;
496a7b52bcSWills Wang }
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