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Searched refs:ACLK_BUS_PRE (Results 1 – 6 of 6) sorted by relevance

/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3328.c96 RK3328_CLK_DUMP(ACLK_BUS_PRE, "aclk_bus", true),
590 case ACLK_BUS_PRE: in rk3328_bus_get_clk()
598 parent = rk3328_bus_get_clk(priv, ACLK_BUS_PRE); in rk3328_bus_get_clk()
603 parent = rk3328_bus_get_clk(priv, ACLK_BUS_PRE); in rk3328_bus_get_clk()
623 case ACLK_BUS_PRE: in rk3328_bus_set_clk()
635 ACLK_BUS_PRE), in rk3328_bus_set_clk()
644 ACLK_BUS_PRE), in rk3328_bus_set_clk()
812 case ACLK_BUS_PRE: in rk3328_clk_get_rate()
894 case ACLK_BUS_PRE: in rk3328_clk_set_rate()
1308 rk3328_bus_set_clk(priv, ACLK_BUS_PRE, ACLK_BUS_HZ); in rkclk_init()
H A Dclk_px30.c77 PX30_CLK_DUMP(ACLK_BUS_PRE, "aclk_bus", true),
907 case ACLK_BUS_PRE: in px30_bus_get_clk()
919 parent = px30_bus_get_clk(priv, ACLK_BUS_PRE); in px30_bus_get_clk()
941 case ACLK_BUS_PRE: in px30_bus_set_clk()
959 DIV_ROUND_UP(px30_bus_get_clk(priv, ACLK_BUS_PRE), hz); in px30_bus_set_clk()
1359 case ACLK_BUS_PRE: in px30_clk_get_rate()
1445 case ACLK_BUS_PRE: in px30_clk_set_rate()
1796 aclk_bus_rate = px30_bus_get_clk(cru_priv, ACLK_BUS_PRE); in px30_gpll_set_pmuclk()
1814 px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, aclk_bus_rate / div); in px30_gpll_set_pmuclk()
1832 px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, aclk_bus_rate); in px30_gpll_set_pmuclk()
[all …]
/rk3399_rockchip-uboot/include/dt-bindings/clock/
H A Dpx30-cru.h106 #define ACLK_BUS_PRE 171 macro
H A Drk3328-cru.h107 #define ACLK_BUS_PRE 136 macro
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drk3328.dtsi384 <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
393 <&cru ACLK_BUS_PRE>, <&cru HCLK_BUS_PRE>,
H A Dpx30.dtsi717 <&pmucru SCLK_WIFI_PMU>, <&cru ACLK_BUS_PRE>,