Searched refs:xlat_regime (Results 1 – 10 of 10) sorted by relevance
79 if (ctx->xlat_regime == EL1_EL0_REGIME) { in is_mmu_enabled_ctx()83 assert(ctx->xlat_regime == EL2_REGIME); in is_mmu_enabled_ctx()98 uint64_t xlat_arch_regime_get_xn_desc(int xlat_regime) in xlat_arch_regime_get_xn_desc() argument100 if (xlat_regime == EL1_EL0_REGIME) { in xlat_arch_regime_get_xn_desc()103 assert(xlat_regime == EL2_REGIME); in xlat_arch_regime_get_xn_desc()108 void xlat_arch_tlbi_va(uintptr_t va, int xlat_regime) in xlat_arch_tlbi_va() argument116 if (xlat_regime == EL1_EL0_REGIME) { in xlat_arch_tlbi_va()119 assert(xlat_regime == EL2_REGIME); in xlat_arch_tlbi_va()175 uintptr_t max_va, __unused int xlat_regime) in setup_mmu_cfg() argument195 if (xlat_regime == EL1_EL0_REGIME) { in setup_mmu_cfg()[all …]
70 assert(ctx->xlat_regime == EL3_REGIME); in xlat_arch_get_pas()113 if ((ctx->xlat_regime == EL3_REGIME) && (pas == MT_ROOT)) { in xlat_arch_get_pas()195 if (ctx->xlat_regime == EL1_EL0_REGIME) { in is_mmu_enabled_ctx()198 } else if (ctx->xlat_regime == EL2_REGIME) { in is_mmu_enabled_ctx()202 assert(ctx->xlat_regime == EL3_REGIME); in is_mmu_enabled_ctx()221 uint64_t xlat_arch_regime_get_xn_desc(int xlat_regime) in xlat_arch_regime_get_xn_desc() argument223 if (xlat_regime == EL1_EL0_REGIME) { in xlat_arch_regime_get_xn_desc()226 assert((xlat_regime == EL2_REGIME) || in xlat_arch_regime_get_xn_desc()227 (xlat_regime == EL3_REGIME)); in xlat_arch_regime_get_xn_desc()232 void xlat_arch_tlbi_va(uintptr_t va, int xlat_regime) in xlat_arch_tlbi_va() argument[all …]
97 assert(tf_xlat_ctx.xlat_regime == EL_REGIME_INVALID); in init_xlat_tables()102 tf_xlat_ctx.xlat_regime = EL1_EL0_REGIME; in init_xlat_tables()104 tf_xlat_ctx.xlat_regime = EL2_REGIME; in init_xlat_tables()107 tf_xlat_ctx.xlat_regime = EL3_REGIME; in init_xlat_tables()144 if (tf_xlat_ctx.xlat_regime == EL1_EL0_REGIME) { in xlat_make_tables_readonly()146 } else if (tf_xlat_ctx.xlat_regime == EL3_REGIME) { in xlat_make_tables_readonly()149 assert(tf_xlat_ctx.xlat_regime == EL2_REGIME); in xlat_make_tables_readonly()156 assert(tf_xlat_ctx.xlat_regime == EL1_EL0_REGIME); in xlat_make_tables_readonly()174 if (tf_xlat_ctx.xlat_regime == EL1_EL0_REGIME) { in xlat_make_tables_readonly()177 assert(tf_xlat_ctx.xlat_regime == EL3_REGIME); in xlat_make_tables_readonly()
59 int xlat_regime = ctx->xlat_regime; in xlat_desc_print() local70 if ((xlat_regime == EL3_REGIME) || (xlat_regime == EL2_REGIME)) { in xlat_desc_print()75 assert(xlat_regime == EL1_EL0_REGIME); in xlat_desc_print()107 assert(ctx->xlat_regime == EL3_REGIME); in xlat_desc_print()137 if (ctx->xlat_regime == EL3_REGIME) { in xlat_desc_print()254 if (ctx->xlat_regime == EL1_EL0_REGIME) { in xlat_tables_print()256 } else if (ctx->xlat_regime == EL2_REGIME) { in xlat_tables_print()259 assert(ctx->xlat_regime == EL3_REGIME); in xlat_tables_print()386 assert((ctx->xlat_regime == EL1_EL0_REGIME) || in xlat_get_mem_attributes_internal()387 (ctx->xlat_regime == EL2_REGIME) || in xlat_get_mem_attributes_internal()[all …]
53 uint64_t xlat_arch_regime_get_xn_desc(int xlat_regime);66 void xlat_arch_tlbi_va(uintptr_t va, int xlat_regime);
145 if (ctx->xlat_regime == EL1_EL0_REGIME) { in xlat_desc()154 assert((ctx->xlat_regime == EL2_REGIME) || in xlat_desc()155 (ctx->xlat_regime == EL3_REGIME)); in xlat_desc()178 desc |= xlat_arch_regime_get_xn_desc(ctx->xlat_regime); in xlat_desc()200 desc |= xlat_arch_regime_get_xn_desc(ctx->xlat_regime); in xlat_desc()391 xlat_arch_tlbi_va(table_idx_va, ctx->xlat_regime); in xlat_tables_unmap_region()411 ctx->xlat_regime); in xlat_tables_unmap_region()1182 int xlat_regime, int *mapped_regions) in xlat_setup_dynamic_ctx() argument1184 ctx->xlat_regime = xlat_regime; in xlat_setup_dynamic_ctx()1214 assert((ctx->xlat_regime == EL3_REGIME) || in init_xlat_tables_ctx()[all …]
112 int xlat_regime; member175 .xlat_regime = (_xlat_regime) \
68 uintptr_t max_va, int xlat_regime);
266 int xlat_regime, int *mapped_regions);
714 sp->xlat_ctx_handle->xlat_regime = EL1_EL0_REGIME; in spmc_el0_sp_setup()