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Searched refs:uint8_t (Results 1 – 25 of 586) sorted by relevance

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/rk3399_ARM-atf/drivers/st/ddr/phy/firmware/include/
H A Dmnpmusrammsgblock_ddr4.h16 uint8_t reserved00; /*
47 uint8_t msgmisc; /*
123 uint8_t pstate; /*
132 uint8_t pllbypassen; /*
144 uint8_t dfifreqratio; /*
151 uint8_t bpznresval; /*
162 uint8_t phyodtimpedance; /*
176 uint8_t phydrvimpedance; /*
191 uint8_t phyvref; /*
209 uint8_t dramtype; /*
[all …]
H A Dmnpmusrammsgblock_lpddr4.h16 uint8_t reserved00; /*
47 uint8_t msgmisc; /*
109 uint8_t pstate; /*
118 uint8_t pllbypassen; /*
130 uint8_t dfifreqratio; /*
137 uint8_t bpznresval; /*
148 uint8_t phyodtimpedance; /*
162 uint8_t phydrvimpedance; /*
177 uint8_t phyvref; /*
195 uint8_t lp4misc; /*
[all …]
H A Dmnpmusrammsgblock_ddr3.h17 uint8_t reserved00; /*
48 uint8_t msgmisc; /*
116 uint8_t pstate; /*
125 uint8_t pllbypassen; /*
137 uint8_t dfifreqratio; /*
144 uint8_t bpznresval; /*
155 uint8_t phyodtimpedance; /*
169 uint8_t phydrvimpedance; /*
184 uint8_t phyvref; /*
202 uint8_t dramtype; /*
[all …]
/rk3399_ARM-atf/drivers/nxp/ddr/phy-gen2/
H A Dddr4fw.h15 uint8_t reserved00;
16 uint8_t msg_misc;
18 uint8_t pstate;
19 uint8_t pll_bypass_en;
21 uint8_t dfi_freq_ratio;
22 uint8_t bpznres_val;
23 uint8_t phy_odt_impedance;
24 uint8_t phy_drv_impedance;
25 uint8_t phy_vref;
26 uint8_t dram_type;
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_internal.h75 uint8_t wdt_disable;
79 uint8_t reg_spm_lock_infra_dcm_lsb;
80 uint8_t reg_cxo32k_remove_en_lsb;
81 uint8_t reg_spm_leave_suspend_merge_mask_lsb;
82 uint8_t reg_sysclk0_src_mb_lsb;
83 uint8_t reg_sysclk1_src_mb_lsb;
84 uint8_t reg_sysclk2_src_mb_lsb;
87 uint8_t reg_wfi_op;
88 uint8_t reg_wfi_type;
89 uint8_t reg_mp0_cputop_idle_mask;
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_internal.h83 uint8_t wdt_disable;
87 uint8_t reg_spm_lock_infra_dcm_lsb;
88 uint8_t reg_cxo32k_remove_en_lsb;
89 uint8_t reg_spm_leave_suspend_merge_mask_lsb;
90 uint8_t reg_sysclk0_src_mask_b_lsb;
91 uint8_t reg_sysclk1_src_mask_b_lsb;
92 uint8_t reg_sysclk2_src_mask_b_lsb;
95 uint8_t reg_wfi_op;
96 uint8_t reg_wfi_type;
97 uint8_t reg_mp0_cputop_idle_mask;
[all …]
/rk3399_ARM-atf/drivers/marvell/comphy/
H A Dphy-comphy-cp110.h13 uint8_t g1_ffe_res_sel;
14 uint8_t g1_ffe_cap_sel;
15 uint8_t align90;
16 uint8_t g1_dfe_res;
17 uint8_t g1_amp;
18 uint8_t g1_emph;
19 uint8_t g1_emph_en;
20 uint8_t g1_tx_amp_adj;
21 uint8_t g1_tx_emph_en;
22 uint8_t g1_tx_emph;
[all …]
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_internal.h128 uint8_t wdt_disable;
133 uint8_t reg_srcclken0_ctl;
134 uint8_t reg_srcclken1_ctl;
135 uint8_t reg_spm_lock_infra_dcm;
136 uint8_t reg_srcclken_mask;
137 uint8_t reg_md1_c32rm_en;
138 uint8_t reg_md2_c32rm_en;
139 uint8_t reg_clksq0_sel_ctrl;
140 uint8_t reg_clksq1_sel_ctrl;
141 uint8_t reg_srcclken0_en;
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_internal.h154 uint8_t wdt_disable;
158 uint8_t reg_wfi_op;
160 uint8_t reg_wfi_type;
162 uint8_t reg_mp0_cputop_idle_mask;
164 uint8_t reg_mp1_cputop_idle_mask;
166 uint8_t reg_mcusys_idle_mask;
168 uint8_t reg_md_apsrc_1_sel;
170 uint8_t reg_md_apsrc_0_sel;
172 uint8_t reg_conn_apsrc_sel;
176 uint8_t reg_spm_apsrc_req;
[all …]
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_internal.h121 uint8_t wdt_disable;
126 uint8_t reg_wfi_op;
127 uint8_t reg_wfi_type;
128 uint8_t reg_mp0_cputop_idle_mask;
129 uint8_t reg_mp1_cputop_idle_mask;
130 uint8_t reg_mcusys_idle_mask;
131 uint8_t reg_md_apsrc_1_sel;
132 uint8_t reg_md_apsrc_0_sel;
133 uint8_t reg_conn_apsrc_sel;
140 uint8_t reg_spm_apsrc_req;
[all …]
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_internal.h127 uint8_t wdt_disable;
130 uint8_t reg_wfi_op;
131 uint8_t reg_wfi_type;
132 uint8_t reg_mp0_cputop_idle_mask;
133 uint8_t reg_mp1_cputop_idle_mask;
134 uint8_t reg_mcusys_idle_mask;
135 uint8_t reg_md_apsrc_1_sel;
136 uint8_t reg_md_apsrc_0_sel;
137 uint8_t reg_conn_apsrc_sel;
140 uint8_t reg_spm_apsrc_req;
[all …]
/rk3399_ARM-atf/include/drivers/
H A Dufs.h313 uint8_t resp_code : 7;
314 uint8_t valid : 1;
315 uint8_t reserved0;
316 uint8_t sense_key : 4;
317 uint8_t reserved1 : 1;
318 uint8_t ili : 1;
319 uint8_t eom : 1;
320 uint8_t file_mark : 1;
321 uint8_t info[4];
322 uint8_t asl;
[all …]
H A Dusb_device.h115 #define LOBYTE(x) ((uint8_t)((x) & 0x00FF))
116 #define HIBYTE(x) ((uint8_t)(((x) & 0xFF00) >> 8))
119 uint8_t bm_request;
120 uint8_t b_request;
129 uint8_t (*init)(struct usb_handle *pdev, uint8_t cfgidx);
130 uint8_t (*de_init)(struct usb_handle *pdev, uint8_t cfgidx);
132 uint8_t (*setup)(struct usb_handle *pdev, struct usb_setup_req *req);
133 uint8_t (*ep0_tx_sent)(struct usb_handle *pdev);
134 uint8_t (*ep0_rx_ready)(struct usb_handle *pdev);
136 uint8_t (*data_in)(struct usb_handle *pdev, uint8_t epnum);
[all …]
H A Draw_nand.h91 uint8_t *addr;
103 uint8_t jtg;
104 uint8_t train_cmd;
106 uint8_t nb_param_pages;
107 uint8_t reserved1[17];
109 uint8_t manufacturer[12];
110 uint8_t model[20];
111 uint8_t manufacturer_id;
113 uint8_t reserved2[13];
121 uint8_t num_lun;
[all …]
/rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/src/
H A Dddrphy_phyinit_initstruct.c26 uint8_t msgmisc = 0x00U; /* For fast simulation */ in ddrphy_phyinit_initstruct()
27 uint8_t reserved00 = 0x0U; /* in ddrphy_phyinit_initstruct()
32 uint8_t hdtctrl = 0xFFU; in ddrphy_phyinit_initstruct()
34 uint8_t cspresent = 0x01U; /* in ddrphy_phyinit_initstruct()
46 uint8_t dfimrlmargin = 0x01U; /* 1 is typically good in DDR3 */ in ddrphy_phyinit_initstruct()
48 uint8_t addrmirror = 0x00U; /* in ddrphy_phyinit_initstruct()
53 uint8_t addrmirror = 0xAAU; in ddrphy_phyinit_initstruct()
55 uint8_t wrodtpat_rank0 = 0x01U; /* in ddrphy_phyinit_initstruct()
59 uint8_t wrodtpat_rank1 = 0x02U; /* in ddrphy_phyinit_initstruct()
64 uint8_t wrodtpat_rank2 = 0x04U; /* in ddrphy_phyinit_initstruct()
[all …]
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/
H A Dplat_setup.c62 static const uint8_t tegra_power_domain_tree_desc[] = {
80 const uint8_t *plat_get_power_domain_tree_desc(void) in plat_get_power_domain_tree_desc()
90 (uint8_t)MT_DEVICE | (uint8_t)MT_RW | (uint8_t)MT_SECURE),
92 (uint8_t)MT_DEVICE | (uint8_t)MT_RW | (uint8_t)MT_SECURE),
94 (uint8_t)MT_DEVICE | (uint8_t)MT_RW | (uint8_t)MT_SECURE),
96 (uint8_t)MT_DEVICE | (uint8_t)MT_RW | (uint8_t)MT_SECURE),
99 (uint8_t)MT_DEVICE | (uint8_t)MT_RW | (uint8_t)MT_SECURE),
101 (uint8_t)MT_DEVICE | (uint8_t)MT_RW | (uint8_t)MT_SECURE),
103 (uint8_t)MT_DEVICE | (uint8_t)MT_RW | (uint8_t)MT_SECURE),
106 (uint8_t)MT_DEVICE | (uint8_t)MT_RW | (uint8_t)MT_SECURE),
[all …]
/rk3399_ARM-atf/drivers/ti/ti_sci/
H A Dti_sci.h36 uint8_t abi_major;
37 uint8_t abi_minor;
38 uint8_t sub_version;
39 uint8_t patch_version;
150 int ti_sci_clock_get(uint32_t dev_id, uint8_t clk_id,
153 int ti_sci_clock_idle(uint32_t dev_id, uint8_t clk_id);
154 int ti_sci_clock_put(uint32_t dev_id, uint8_t clk_id);
155 int ti_sci_clock_is_auto(uint32_t dev_id, uint8_t clk_id,
157 int ti_sci_clock_is_on(uint32_t dev_id, uint8_t clk_id,
159 int ti_sci_clock_is_off(uint32_t dev_id, uint8_t clk_id,
[all …]
H A Dti_sci_protocol.h78 uint8_t host;
79 uint8_t seq;
121 uint8_t abi_major;
122 uint8_t abi_minor;
123 uint8_t sub_version;
124 uint8_t patch_version;
138 uint8_t domain;
201 uint8_t state;
234 uint8_t programmed_state;
238 uint8_t current_state;
[all …]
/rk3399_ARM-atf/plat/imx/common/sci/svc/timer/
H A Dtimer_rpc_clnt.c34 uint8_t result; in sc_timer_set_wdog_timeout()
37 RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; in sc_timer_set_wdog_timeout()
38 RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_WDOG_TIMEOUT; in sc_timer_set_wdog_timeout()
52 uint8_t result; in sc_timer_set_wdog_pre_timeout()
55 RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; in sc_timer_set_wdog_pre_timeout()
56 RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_WDOG_PRE_TIMEOUT; in sc_timer_set_wdog_pre_timeout()
69 uint8_t result; in sc_timer_start_wdog()
72 RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; in sc_timer_start_wdog()
73 RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_START_WDOG; in sc_timer_start_wdog()
74 RPC_U8(&msg, 0U) = (uint8_t)lock; in sc_timer_start_wdog()
[all …]
/rk3399_ARM-atf/plat/imx/common/sci/svc/rm/
H A Drm_rpc_clnt.c36 uint8_t result; in sc_rm_partition_alloc()
39 RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; in sc_rm_partition_alloc()
40 RPC_FUNC(&msg) = (uint8_t)RM_FUNC_PARTITION_ALLOC; in sc_rm_partition_alloc()
41 RPC_U8(&msg, 0U) = (uint8_t)secure; in sc_rm_partition_alloc()
42 RPC_U8(&msg, 1U) = (uint8_t)isolated; in sc_rm_partition_alloc()
43 RPC_U8(&msg, 2U) = (uint8_t)restricted; in sc_rm_partition_alloc()
44 RPC_U8(&msg, 3U) = (uint8_t)grant; in sc_rm_partition_alloc()
45 RPC_U8(&msg, 4U) = (uint8_t)coherent; in sc_rm_partition_alloc()
61 uint8_t result; in sc_rm_set_confidential()
64 RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; in sc_rm_set_confidential()
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/spmi/
H A Dpmif_common.h25 int (*read_cmd)(struct pmif *arb, uint8_t opc, uint8_t sid, uint16_t addr, uint8_t *buf,
26 uint8_t len);
27 int (*write_cmd)(struct pmif *arb, uint8_t opc, uint8_t sid, uint16_t addr,
28 const uint8_t *buf, uint8_t len);
36 int pmif_spmi_read_cmd(struct pmif *arb, uint8_t opc, uint8_t sid, uint16_t addr, uint8_t *buf,
37 uint8_t len);
38 int pmif_spmi_write_cmd(struct pmif *arb, uint8_t opc, uint8_t sid, uint16_t addr,
39 const uint8_t *buf, uint8_t len);
/rk3399_ARM-atf/plat/mediatek/include/drivers/
H A Dspmi_api.h15 int spmi_register_zero_write(struct spmi_device *dev, uint8_t data);
16 int spmi_register_read(struct spmi_device *dev, uint8_t addr, uint8_t *buf);
17 int spmi_register_write(struct spmi_device *dev, uint8_t addr, uint8_t data);
18 int spmi_ext_register_read(struct spmi_device *dev, uint8_t addr, uint8_t *buf,
19 uint8_t len);
20 int spmi_ext_register_write(struct spmi_device *dev, uint8_t addr,
21 const uint8_t *buf, uint8_t len);
23 uint8_t *buf, uint8_t len);
25 const uint8_t *buf, uint8_t len);
27 uint8_t *buf, uint16_t mask, uint16_t shift);
[all …]
/rk3399_ARM-atf/lib/psa/
H A Dmeasured_boot_private.h20 uint8_t index;
21 uint8_t sw_type_size;
22 uint8_t version_size;
26 uint8_t is_locked;
28 uint8_t sw_type[SW_TYPE_MAX_SIZE];
29 uint8_t sw_type_len;
30 uint8_t version[VERSION_MAX_SIZE];
31 uint8_t version_len;
35 uint8_t index;
36 uint8_t lock_measurement;
[all …]
/rk3399_ARM-atf/include/lib/dice/
H A Ddice.h85 uint8_t code_hash[DICE_HASH_SIZE];
86 const uint8_t* code_descriptor;
89 uint8_t config_value[DICE_INLINE_CONFIG_SIZE];
90 const uint8_t* config_descriptor;
92 uint8_t authority_hash[DICE_HASH_SIZE];
93 const uint8_t* authority_descriptor;
96 uint8_t hidden[DICE_HIDDEN_SIZE];
102 void* context, const uint8_t cdi_attest[DICE_CDI_SIZE],
103 uint8_t cdi_private_key_seed[DICE_PRIVATE_KEY_SEED_SIZE]);
110 const uint8_t* cdi_public_key,
[all …]
/rk3399_ARM-atf/plat/imx/common/sci/svc/pm/
H A Dpm_rpc_clnt.c35 uint8_t result; in sc_pm_set_sys_power_mode()
38 RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; in sc_pm_set_sys_power_mode()
39 RPC_FUNC(&msg) = (uint8_t)PM_FUNC_SET_SYS_POWER_MODE; in sc_pm_set_sys_power_mode()
40 RPC_U8(&msg, 0U) = (uint8_t)mode; in sc_pm_set_sys_power_mode()
53 uint8_t result; in sc_pm_set_partition_power_mode()
56 RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; in sc_pm_set_partition_power_mode()
57 RPC_FUNC(&msg) = (uint8_t)PM_FUNC_SET_PARTITION_POWER_MODE; in sc_pm_set_partition_power_mode()
58 RPC_U8(&msg, 0U) = (uint8_t)pt; in sc_pm_set_partition_power_mode()
59 RPC_U8(&msg, 1U) = (uint8_t)mode; in sc_pm_set_partition_power_mode()
72 uint8_t result; in sc_pm_get_sys_power_mode()
[all …]

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