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Searched refs:target (Results 1 – 25 of 83) sorted by relevance

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/rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/
H A Dplat_psci_handlers.c178 plat_local_state_t target; in tegra_last_cpu_in_cluster() local
183 target = states[pos]; in tegra_last_cpu_in_cluster()
184 if (target != PLAT_MAX_OFF_STATE) { in tegra_last_cpu_in_cluster()
203 plat_local_state_t target = states[core_pos]; in tegra_get_afflvl1_pwr_state() local
207 if (target == PSTATE_ID_CORE_POWERDN) { in tegra_get_afflvl1_pwr_state()
219 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
224 if (target == PLAT_MAX_OFF_STATE) { in tegra_get_afflvl1_pwr_state()
238 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
246 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
250 return target; in tegra_get_afflvl1_pwr_state()
[all …]
/rk3399_ARM-atf/plat/common/
H A Dplat_gicv3.c273 void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target) in plat_ic_raise_el3_sgi() argument
276 assert(plat_core_pos_by_mpidr(target) >= 0); in plat_ic_raise_el3_sgi()
282 gicv3_raise_sgi((unsigned int)sgi_num, GICV3_G0, target); in plat_ic_raise_el3_sgi()
285 void plat_ic_raise_ns_sgi(int sgi_num, u_register_t target) in plat_ic_raise_ns_sgi() argument
288 assert(plat_core_pos_by_mpidr(target) >= 0); in plat_ic_raise_ns_sgi()
294 gicv3_raise_sgi((unsigned int)sgi_num, GICV3_G1NS, target); in plat_ic_raise_ns_sgi()
297 void plat_ic_raise_s_el1_sgi(int sgi_num, u_register_t target) in plat_ic_raise_s_el1_sgi() argument
300 assert(plat_core_pos_by_mpidr(target) >= 0); in plat_ic_raise_s_el1_sgi()
306 gicv3_raise_sgi((unsigned int)sgi_num, GICV3_G1S, target); in plat_ic_raise_s_el1_sgi()
H A Dplat_gicv2.c248 void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target) in plat_ic_raise_el3_sgi() argument
254 id = plat_core_pos_by_mpidr(target); in plat_ic_raise_el3_sgi()
266 void plat_ic_raise_ns_sgi(int sgi_num, u_register_t target) in plat_ic_raise_ns_sgi() argument
271 id = plat_core_pos_by_mpidr(target); in plat_ic_raise_ns_sgi()
280 void plat_ic_raise_s_el1_sgi(int sgi_num, u_register_t target) in plat_ic_raise_s_el1_sgi() argument
288 id = plat_core_pos_by_mpidr(target); in plat_ic_raise_s_el1_sgi()
H A Dplat_psci_common.c166 plat_local_state_t target = PLAT_MAX_OFF_STATE, temp; in plat_get_target_pwr_state() local
175 if (temp < target) { in plat_get_target_pwr_state()
176 target = temp; in plat_get_target_pwr_state()
181 return target; in plat_get_target_pwr_state()
/rk3399_ARM-atf/drivers/marvell/
H A Dccu.c191 uint32_t target; in ccu_temp_win_remove() local
195 target = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in ccu_temp_win_remove()
196 target >>= CCU_TARGET_ID_OFFSET; in ccu_temp_win_remove()
197 target &= CCU_TARGET_ID_MASK; in ccu_temp_win_remove()
202 if ((win->target_id != target) || (win->base_addr != base)) { in ccu_temp_win_remove()
226 uint32_t target; in ccu_dram_target_get() local
228 target = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in ccu_dram_target_get()
229 target >>= CCU_TARGET_ID_OFFSET; in ccu_dram_target_get()
230 target &= CCU_TARGET_ID_MASK; in ccu_dram_target_get()
232 return target; in ccu_dram_target_get()
[all …]
H A Dgwin.c132 uint32_t target; in gwin_temp_win_remove() local
136 target = mmio_read_32(GWIN_CR_OFFSET(ap_index, win_id)); in gwin_temp_win_remove()
137 target >>= WIN_TARGET_SHIFT; in gwin_temp_win_remove()
138 target &= WIN_TARGET_MASK; in gwin_temp_win_remove()
144 if (win->target_id != target) { in gwin_temp_win_remove()
H A Dio_win.c138 uint32_t target; in iow_temp_win_remove() local
142 target = mmio_read_32(IO_WIN_CR_OFFSET(ap_index, win_id)); in iow_temp_win_remove()
147 if ((win->target_id != target) || (win->base_addr != base)) { in iow_temp_win_remove()
/rk3399_ARM-atf/lib/locks/exclusive/aarch32/
H A Dspinlock.c9 void __attribute__((target("arm"))) spin_lock(spinlock_t *lock) in spin_lock()
28 void __attribute__((target("arm"))) spin_unlock(spinlock_t *lock) in spin_unlock()
54 bool __attribute__((target("arm"))) spin_trylock(spinlock_t *lock) in spin_trylock()
/rk3399_ARM-atf/lib/libfdt/
H A Dfdt_overlay.c721 int target; in overlay_prevent_phandle_overwrite() local
731 target = fdt_overlay_target_offset(fdt, fdto, fragment, NULL); in overlay_prevent_phandle_overwrite()
732 if (target == -FDT_ERR_NOTFOUND) in overlay_prevent_phandle_overwrite()
738 else if (target < 0) in overlay_prevent_phandle_overwrite()
739 return target; in overlay_prevent_phandle_overwrite()
741 ret = overlay_prevent_phandle_overwrite_node(fdt, target, in overlay_prevent_phandle_overwrite()
769 static int overlay_apply_node(void *fdt, int target, in overlay_apply_node() argument
792 ret = fdt_setprop(fdt, target, name, prop, prop_len); in overlay_apply_node()
802 nnode = fdt_add_subnode(fdt, target, name); in overlay_apply_node()
804 nnode = fdt_subnode_offset(fdt, target, name); in overlay_apply_node()
[all …]
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/
H A Dplat_psci_handlers.c187 plat_local_state_t target; in tegra_last_on_cpu_in_cluster() local
192 target = states[pos]; in tegra_last_on_cpu_in_cluster()
193 if (target != PLAT_MAX_OFF_STATE) { in tegra_last_on_cpu_in_cluster()
210 plat_local_state_t target = states[core_pos]; in tegra_get_afflvl1_pwr_state() local
214 if (target == PLAT_MAX_OFF_STATE) { in tegra_get_afflvl1_pwr_state()
231 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
235 return target; in tegra_get_afflvl1_pwr_state()
246 plat_local_state_t target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state() local
251 target = PSTATE_ID_SOC_POWERDN; in tegra_soc_get_target_pwr_state()
256 target = tegra_get_afflvl1_pwr_state(states, ncpu); in tegra_soc_get_target_pwr_state()
[all …]
/rk3399_ARM-atf/plat/marvell/armada/a3k/common/
H A Ddram_win.c47 enum cpu_win_target target; member
191 uint32_t base_reg, ctrl_reg, size_reg, enabled, target; in dram_win_map_build() local
196 target = (ctrl_reg & CPU_DEC_CR_WIN_TARGET_MASK) >> in dram_win_map_build()
200 if ((enabled == 0) || (target != DRAM_CPU_DEC_TARGET_NUM)) in dram_win_map_build()
262 ctrl_reg |= (win_cfg->target << CPU_DEC_CR_WIN_TARGET_OFFS); in cpu_win_set()
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/
H A Dplat_psci_handlers.c105 plat_local_state_t target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state() local
113 target = *(states + core_pos); in tegra_soc_get_target_pwr_state()
115 target = *(states + cpu); in tegra_soc_get_target_pwr_state()
117 if ((lvl == MPIDR_AFFLVL1) && (target == PSTATE_ID_CLUSTER_IDLE)) { in tegra_soc_get_target_pwr_state()
131 target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state()
150 target = PSTATE_ID_CLUSTER_IDLE; in tegra_soc_get_target_pwr_state()
171 target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state()
176 (target == PSTATE_ID_SOC_POWERDN)) { in tegra_soc_get_target_pwr_state()
179 target = PSTATE_ID_SOC_POWERDN; in tegra_soc_get_target_pwr_state()
185 return target; in tegra_soc_get_target_pwr_state()
/rk3399_ARM-atf/drivers/arm/gic/v2/
H A Dgicv2_main.c423 unsigned int sgir_val, target; in gicv2_raise_sgi() local
438 target = driver_data->target_masks[proc_num]; in gicv2_raise_sgi()
439 assert(target != 0U); in gicv2_raise_sgi()
441 sgir_val = GICV2_SGIR_VALUE(SGIR_TGT_SPECIFIC, target, ns, sgi_num); in gicv2_raise_sgi()
459 unsigned int target; in gicv2_set_spi_routing() local
477 target = GIC_TARGET_CPU_MASK; in gicv2_set_spi_routing()
480 target = driver_data->target_masks[proc_num]; in gicv2_set_spi_routing()
481 assert(target != 0U); in gicv2_set_spi_routing()
484 gicd_set_itargetsr(driver_data->gicd_base, id, target); in gicv2_set_spi_routing()
H A Dgicv2_private.h44 unsigned int target) in gicd_set_itargetsr() argument
46 uint8_t val = target & GIC_TARGET_CPU_MASK; in gicd_set_itargetsr()
/rk3399_ARM-atf/make_helpers/
H A Dtoolchain.mk405 target-arch-aarch32-arm-clang := arm-arm-none-eabi
406 target-arch-aarch64-arm-clang := aarch64-arm-none-eabi
407 target-arch-aarch32-llvm-clang := arm-arm-none-eabi
408 target-arch-aarch64-llvm-clang := aarch64-arm-none-elf
410 target-flag-aarch32-arm-clang := -target $(target-arch-aarch32-arm-clang)
411 target-flag-aarch64-arm-clang := -target $(target-arch-aarch64-arm-clang)
412 target-flag-aarch32-llvm-clang := -target $(target-arch-aarch32-llvm-clang)
413 target-flag-aarch64-llvm-clang := -target $(target-arch-aarch64-llvm-clang)
450 toolchain-ld-option-llvm-clang = $(shell $($(1)-ld) $(target-flag-$(1)-llvm-clang) $\
456 toolchain-ld-option-arm-clang = $(shell $($(1)-ld) $(target-flag-$(1)-arm-clang) $\
/rk3399_ARM-atf/plat/qti/qtiseclib/inc/
H A Dqtiseclib_cb_interface.h39 void qtiseclib_cb_ic_raise_sgi(int sgi_num, u_register_t target);
41 u_register_t target);
/rk3399_ARM-atf/plat/xilinx/common/pm_service/
H A Dpm_api_sys.c196 enum pm_ret_status pm_req_wakeup(uint32_t target, uint32_t set_address, in pm_req_wakeup() argument
202 PM_PACK_PAYLOAD5(payload, LIBPM_MODULE_ID, flag, PM_REQ_WAKEUP, target, in pm_req_wakeup()
256 enum pm_ret_status pm_force_powerdown(uint32_t target, uint8_t ack, in pm_force_powerdown() argument
264 target, ack); in pm_force_powerdown()
319 enum pm_ret_status pm_set_wakeup_source(uint32_t target, uint32_t wkup_device, in pm_set_wakeup_source() argument
325 target, wkup_device, enable); in pm_set_wakeup_source()
/rk3399_ARM-atf/docs/design_documents/
H A Dcmake_framework.rst29 * Host and target system agnostic project.
54 processing, and the target creation, source file description are mixed and
73 The framework provides an API called STGT ('simple target') to describe the
75 libraries are linked, etc. The API wraps the CMake target functions, and also
77 the previous section. A group can be applied onto a target, i.e. a collection of
80 these are global and applied onto each target.
126 Next, we create a target called *fw1* and add the *mem_conf* setting group to
127 it. This means that all source and header files used by the target will have all
128 the parameters declared in the setting group. Then we set the target type to
129 executable, and add some source files. Since the target has the parameters from
/rk3399_ARM-atf/plat/xilinx/common/include/
H A Dpm_api_sys.h32 enum pm_ret_status pm_req_wakeup(uint32_t target, uint32_t set_address,
34 enum pm_ret_status pm_set_wakeup_source(uint32_t target, uint32_t wkup_device,
39 enum pm_ret_status pm_force_powerdown(uint32_t target, uint8_t ack,
/rk3399_ARM-atf/plat/qti/qtiseclib/src/
H A Dqtiseclib_cb_interface.c100 void qtiseclib_cb_ic_raise_sgi(int sgi_num, u_register_t target) in qtiseclib_cb_ic_raise_sgi() argument
102 plat_ic_raise_el3_sgi(sgi_num, target); in qtiseclib_cb_ic_raise_sgi()
106 u_register_t target) in qtiseclib_cb_set_spi_routing() argument
110 gic_set_spi_routing(id, irm, target); in qtiseclib_cb_set_spi_routing()
/rk3399_ARM-atf/plat/qti/common/src/
H A Dqti_gic_v3.c141 void gic_set_spi_routing(unsigned int id, unsigned int irm, u_register_t target) in gic_set_spi_routing() argument
143 gicv3_set_spi_routing(id, irm, target); in gic_set_spi_routing()
/rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/
H A Dzynqmp_pm_api_sys.h73 enum pm_ret_status pm_req_suspend(enum pm_node_id target,
85 enum pm_ret_status pm_force_powerdown(enum pm_node_id target,
89 enum pm_ret_status pm_req_wakeup(enum pm_node_id target,
95 enum pm_ret_status pm_set_wakeup_source(enum pm_node_id target,
/rk3399_ARM-atf/plat/mediatek/mt8173/
H A Dplat_pm.c592 plat_local_state_t target = PLAT_MAX_OFF_STATE, temp; in plat_get_target_pwr_state() local
598 if (temp < target) in plat_get_target_pwr_state()
599 target = temp; in plat_get_target_pwr_state()
602 return target; in plat_get_target_pwr_state()
/rk3399_ARM-atf/docs/plat/marvell/armada/
H A Duart-booting.rst47 produced by ``mrvl_uart`` target or also with ``flash-image.bin`` file produced by ``mrvl_flash``
48 target, which is the exactly same file as used for flashing. So when using CZ.NIC mox-imager there
63 To download single file image built by ``mrvl_flash`` target at the highest speed, run:
69 To download images from ``uart-images.tgz.bin`` archive built by ``mrvl_uart`` target for
/rk3399_ARM-atf/include/drivers/marvell/
H A Dccu.h46 void ccu_dram_target_set(int ap_index, uint32_t target);

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