History log of /rk3399_ARM-atf/plat/common/plat_psci_common.c (Results 1 – 25 of 29)
Revision Date Author Comments
# 452afcfb 07-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge changes from topic "xlnx_fix_gen_unused_var" into integration

* changes:
fix(console): create unique variable name
fix(bl31): declare function as static
fix(psci): initialise variable to

Merge changes from topic "xlnx_fix_gen_unused_var" into integration

* changes:
fix(console): create unique variable name
fix(bl31): declare function as static
fix(psci): initialise variable to default zero
fix(services): declare unused parameters as void
fix(lib): declare unused parameters as void
fix(platforms): declare unused parameters as void

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# 877279de 18-Apr-2024 Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

fix(platforms): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change

fix(platforms): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: Ifa48fa64e87481bb43a877f39f48108fd2e13c42
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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# d77a1ec5 07-Mar-2025 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "xlnx_fix_gen_missing_brace" into integration

* changes:
fix(platforms): modify function to have single return
fix(el3-runtime): add missing curly braces
fix(locks): a

Merge changes from topic "xlnx_fix_gen_missing_brace" into integration

* changes:
fix(platforms): modify function to have single return
fix(el3-runtime): add missing curly braces
fix(locks): add missing curly braces
fix(psci): add missing curly braces
fix(bl31): add missing curly braces
fix(console): add missing curly braces
fix(arm-drivers): add missing curly braces
fix(common): add missing curly braces
fix(platforms): add missing curly braces

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# 7e288d11 25-Apr-2024 Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

fix(platforms): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement b

fix(platforms): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement body within the curly braces.

Change-Id: I1327a206782ccd341c0c7eaa3f26078150458ed0
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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# 2e0354f5 25-Feb-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes I3d950e72,Id315a8fe,Ib62e6e9b,I1d0475b2 into integration

* changes:
perf(cm): drop ZCR_EL3 saving and some ISBs and replace them with root context
perf(psci): get PMF timestamps wi

Merge changes I3d950e72,Id315a8fe,Ib62e6e9b,I1d0475b2 into integration

* changes:
perf(cm): drop ZCR_EL3 saving and some ISBs and replace them with root context
perf(psci): get PMF timestamps with no cache flushes if possible
perf(amu): greatly simplify AMU context management
perf(mpmm): greatly simplify MPMM enablement

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# abf6666e 06-Nov-2024 Boyan Karatotev <boyan.karatotev@arm.com>

perf(psci): get PMF timestamps with no cache flushes if possible

Whenever we have HW_ASSISTED_COHERENCY, caches are enabled early and we
let the cores do the cache maintenance on our behalf. This is

perf(psci): get PMF timestamps with no cache flushes if possible

Whenever we have HW_ASSISTED_COHERENCY, caches are enabled early and we
let the cores do the cache maintenance on our behalf. This is true for
the PSCI stat timestamp capture and used to be the case. However, a
model bug required us to do the cache maintenance manually. That has
been fixed so we can revert back.

Change-Id: Id315a8fea500fb5e2433d3786b2be5a9084300a7
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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# e97841eb 30-Mar-2020 Olivier Deprez <olivier.deprez@arm.com>

Merge "Flush dcache when storing timestamp" into integration


# f27b6924 26-Mar-2020 Zelalem <zelalem.aweke@arm.com>

Flush dcache when storing timestamp

On DynamIQ CPU FVPs, stats test cases are failing when
hardware-assisted coherency is enabled due to a corrupt
timestamp value. Investigation of the issue indicat

Flush dcache when storing timestamp

On DynamIQ CPU FVPs, stats test cases are failing when
hardware-assisted coherency is enabled due to a corrupt
timestamp value. Investigation of the issue indicates that
on these models the timestamp value is stored in cache
instead of memory. This patch flushes the dcache when the
timestamp is stored to make sure it is stored in memory.

Change-Id: I05cd54ba5991a5a96dd07f1e08b5212273201411
Signed-off-by: Zelalem <zelalem.aweke@arm.com>

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# 876b3849 21-Feb-2020 joanna.farley <joanna.farley@arm.com>

Merge changes from topic "tegra-downstream-02092020" into integration

* changes:
Tegra: spe: uninit console on a timeout
Tegra: handler to check support for System Suspend
Tegra: bpmp_ipc: imp

Merge changes from topic "tegra-downstream-02092020" into integration

* changes:
Tegra: spe: uninit console on a timeout
Tegra: handler to check support for System Suspend
Tegra: bpmp_ipc: improve cyclomatic complexity
Tegra: platform handler to relocate BL32 image
Tegra: common: improve cyclomatic complexity
Tegra210: secure PMC hardware block
Tegra: delay_timer: support for physical secure timer
include: move MHZ_TICKS_PER_SEC to utils_def.h
Tegra194: memctrl: lock mc stream id security config
Tegra210: resume PMC hardware block for all platforms
Tegra: macro for legacy WDT FIQ handling
Tegra186: enable higher performance non-cacheable load forwarding
Tegra210: enable higher performance non-cacheable load forwarding
cpus: higher performance non-cacheable load forwarding

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# d4b29105 13-Feb-2020 Varun Wadekar <vwadekar@nvidia.com>

include: move MHZ_TICKS_PER_SEC to utils_def.h

This patch moves the MHZ_TICKS_PER_SEC macro to utils_def.h
for other platforms to use.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id:

include: move MHZ_TICKS_PER_SEC to utils_def.h

This patch moves the MHZ_TICKS_PER_SEC macro to utils_def.h
for other platforms to use.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I6c4dc733f548d73cfdb3515ec9ad89a9efaf4407

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# 43636796 10-Jan-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "Unify type of "cpu_idx" across PSCI module." into integration


# 5b33ad17 13-Dec-2019 Deepika Bhavnani <deepika.bhavnani@arm.com>

Unify type of "cpu_idx" across PSCI module.

NOTE for platform integrators:
API `plat_psci_stat_get_residency()` third argument
`last_cpu_idx` is changed from "signed int" to the
"unsigned i

Unify type of "cpu_idx" across PSCI module.

NOTE for platform integrators:
API `plat_psci_stat_get_residency()` third argument
`last_cpu_idx` is changed from "signed int" to the
"unsigned int" type.

Issue / Trouble points
1. cpu_idx is used as mix of `unsigned int` and `signed int` in code
with typecasting at some places leading to coverity issues.

2. Underlying platform API's return cpu_idx as `unsigned int`
and comparison is performed with platform specific defines
`PLAFORM_xxx` which is not consistent

Misra Rule 10.4:
The value of a complex expression of integer type may only be cast to
a type that is narrower and of the same signedness as the underlying
type of the expression.

Based on above points, cpu_idx is kept as `unsigned int` to match
the API's and low-level functions and platform defines are updated
where ever required

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: Ib26fd16e420c35527204b126b9b91e8babcc3a5c

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# 1f4b7170 09-Jan-2020 Manish Pandey <manish.pandey2@arm.com>

Merge "Simplify PMF helper macro definitions across header files" into integration


# daa9b6ea 06-Jan-2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Simplify PMF helper macro definitions across header files

In further patches, we aim to enable -Wredundant-decls by default.
This rearragement of helper macros is necessary to make Coverity
tool hap

Simplify PMF helper macro definitions across header files

In further patches, we aim to enable -Wredundant-decls by default.
This rearragement of helper macros is necessary to make Coverity
tool happy as well as making sure there are no redundant function
declarations for PMF related declarations.

Also, PMF related macros were added to provide appropriate function
declarations for helper APIs which capture PSCI statistics.

Change-Id: I36273032dde8fa079ef71235ed3a4629c5bfd981
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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# a3b16996 02-Aug-2019 Alexei Fedorov <Alexei.Fedorov@arm.com>

Merge "Switch AARCH32/AARCH64 to __aarch64__" into integration


# 402b3cf8 09-Jul-2019 Julius Werner <jwerner@chromium.org>

Switch AARCH32/AARCH64 to __aarch64__

NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.

All common C compilers pre-define the same macros to signal which
architecture the cod

Switch AARCH32/AARCH64 to __aarch64__

NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.

All common C compilers pre-define the same macros to signal which
architecture the code is being compiled for: __arm__ for AArch32 (or
earlier versions) and __aarch64__ for AArch64. There's no need for TF-A
to define its own custom macros for this. In order to unify code with
the export headers (which use __aarch64__ to avoid another dependency),
let's deprecate the AARCH32 and AARCH64 macros and switch the code base
over to the pre-defined standard macro. (Since it is somewhat
unintuitive that __arm__ only means AArch32, let's standardize on only
using __aarch64__.)

Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200
Signed-off-by: Julius Werner <jwerner@chromium.org>

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# 9a207532 04-Jan-2019 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge pull request #1726 from antonio-nino-diaz-arm/an/includes

Sanitise includes across codebase


# 09d40e0e 14-Dec-2018 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- inclu

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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# 60e062fb 25-Jul-2018 danh-arm <dan.handley@arm.com>

Merge pull request #1486 from antonio-nino-diaz-arm/an/psci-misra

Fix several MISRA defects in PSCI library


# 2bc3dba9 18-Jul-2018 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

PSCI: Fix MISRA defects in platform code

Fix violations of MISRA C-2012 Rules 10.1, 10.3, 13.3, 14.4, 17.7 and
17.8.

Change-Id: I6c9725e428b5752f1d80684ec29cb6c52a5c0c2d
Signed-off-by: Antonio Nino

PSCI: Fix MISRA defects in platform code

Fix violations of MISRA C-2012 Rules 10.1, 10.3, 13.3, 14.4, 17.7 and
17.8.

Change-Id: I6c9725e428b5752f1d80684ec29cb6c52a5c0c2d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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# 1083b2b3 20-Jul-2018 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

PSCI: Fix types of definitions

Also change header guards to fix defects of MISRA C-2012 Rule 21.1.

Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57
Acked-by: Sumit Garg <sumit.garg@linaro.org>

PSCI: Fix types of definitions

Also change header guards to fix defects of MISRA C-2012 Rule 21.1.

Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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# 8705ec89 08-Nov-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1154 from soby-mathew/sm/fix_psci_stat

Fix PSCI STAT time stamp collection


# bfc87a8d 16-Oct-2017 Soby Mathew <soby.mathew@arm.com>

Fix PSCI STAT time stamp collection

This patch includes various fixes for PSCI STAT functionality
relating to timestamp collection:

1. The PSCI stat accounting for retention states for higher level

Fix PSCI STAT time stamp collection

This patch includes various fixes for PSCI STAT functionality
relating to timestamp collection:

1. The PSCI stat accounting for retention states for higher level
power domains were done outside the locks which could lead to
spurious values in some race conditions. This is moved inside
the locks. Also, the call to start the stat accounting was redundant
which is now removed.

2. The timestamp wrap-around case when calculating residency did
not cater for AArch32. This is now fixed.

3. In the warm boot path, `plat_psci_stat_accounting_stop()` was
getting invoked prior to population of target power states. This
is now corrected.

Change-Id: I851526455304fb74ff0a724f4d5318cd89e19589
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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# f132b4a0 04-May-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #925 from dp-arm/dp/spdx

Use SPDX license identifiers


# 82cb2c1a 03-May-2017 dp-arm <dimitris.papastamos@arm.com>

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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