Searched refs:scheme (Results 1 – 10 of 10) sorted by relevance
| /rk3399_ARM-atf/docs/components/ |
| H A D | exception-handling.rst | 63 ELs. In this scheme, the handling spans various secure ELs. 69 an |SDEI| event). In this scheme, exception handling potentially and 90 is based on a priority scheme. This priority scheme is closely tied to how the 197 upper bits of the 8 bits are writeable. In the scheme described above, when 579 The GIC priority scheme, by design, prioritises Secure interrupts over Normal 606 priority scheme, the size of descriptor array exposed with
|
| H A D | sdei.rst | 361 Hypervisor/OS. In doing so, it modifies the priority scheme defined by Interrupt
|
| H A D | rmm-el3-comms-spec.rst | 29 uses a separate version number but with the same scheme. 1284 The Root Complex Info structure version uses the same numbering scheme as described in
|
| /rk3399_ARM-atf/docs/plat/ |
| H A D | imx8m.rst | 96 The reason for the MT_RW attribute mapping scheme is the fact that the SMC
|
| H A D | allwinner.rst | 54 is detected at runtime, this control scheme will be ignored, and SCPI
|
| /rk3399_ARM-atf/include/plat/marvell/odyssey/csr/ |
| H A D | ody-csrs-cst_shrd_funnel.h | 335 uint32_t scheme : 4; member
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | trusted-board-boot.rst | 27 - The key provisioning scheme: which keys need to programmed into the device
|
| H A D | firmware-design.rst | 1234 BL31 implements a scheme for reporting the processor state when an unhandled 1379 properties. In this scheme, in both GICv2 and GICv3 driver data structures, the
|
| /rk3399_ARM-atf/docs/getting_started/ |
| H A D | build-options.rst | 819 compliant PKCS#1 RSA 2.1 scheme.
|
| /rk3399_ARM-atf/docs/ |
| H A D | change-log.md | 10728 scheme as RPi4
|