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Searched refs:rdata (Results 1 – 16 of 16) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/pmic_wrap/
H A Dpmic_wrap_init_v3.c83 uint32_t bytecnt, uint32_t wdata, uint32_t *rdata) in pwrap_swinf_acc() argument
137 if (rdata == NULL) { in pwrap_swinf_acc()
152 *rdata = mmio_read_32((uintptr_t)(&mtk_pwrap->wacs[swinf_no].rdata)); in pwrap_swinf_acc()
166 int32_t pwrap_read(uint32_t adr, uint32_t *rdata) in pwrap_read() argument
169 DEFAULT_SLVID, adr, DEFAULT_BYTECNT, 0x0, rdata); in pwrap_read()
180 uint32_t rdata; in pwrap_read_field() local
185 ret = pwrap_read(reg, &rdata); in pwrap_read_field()
187 *val = (rdata >> shift) & mask; in pwrap_read_field()
211 uint32_t rdata = 0; in pwrap_read_test() local
214 ret = pwrap_read(DEW_READ_TEST, &rdata); in pwrap_read_test()
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H A Dpmic_wrap_init_v2.c84 uint32_t *rdata, uint32_t init_check) in pwrap_wacs2() argument
122 if (rdata == NULL) { in pwrap_wacs2()
127 *rdata = reg_rdata; in pwrap_wacs2()
135 int32_t pwrap_read(uint32_t adr, uint32_t *rdata) in pwrap_read() argument
137 return pwrap_wacs2(0, adr, 0, rdata, 1); in pwrap_read()
H A Dpmic_wrap_init.c100 uint32_t *rdata, in pwrap_wacs2() argument
134 if (rdata == NULL) { in pwrap_wacs2()
147 *rdata = ((reg_rdata >> RDATA_WACS_RDATA_SHIFT) in pwrap_wacs2()
157 int32_t pwrap_read(uint32_t adr, uint32_t *rdata) in pwrap_read() argument
159 return pwrap_wacs2(0, adr, 0, rdata, 1); in pwrap_read()
H A Dpmic_wrap_init_common.h16 int32_t pwrap_read(uint32_t adr, uint32_t *rdata);
/rk3399_ARM-atf/plat/brcm/board/stingray/src/
H A Dsr_paxb_phy.c512 unsigned int rdata; in paxb_serdes_gate_clock() local
526 paxb_pmi_read(core_idx, PMI_ADDR_LANE0(PMI_PLL_CTRL_4), &rdata); in paxb_serdes_gate_clock()
528 rdata |= PMI_SERDES_CLK_ENABLE; in paxb_serdes_gate_clock()
530 rdata &= ~PMI_SERDES_CLK_ENABLE; in paxb_serdes_gate_clock()
531 paxb_pmi_write(core_idx, PMI_ADDR_BCAST(PMI_PLL_CTRL_4), rdata); in paxb_serdes_gate_clock()
538 uint32_t rdata; in paxb_gen3_serdes_init() local
568 &rdata); in paxb_gen3_serdes_init()
569 } while ((rdata & 0x01) == 0 && timeout--); in paxb_gen3_serdes_init()
578 &rdata); in paxb_gen3_serdes_init()
579 } while ((rdata & 0x01) == 0 && timeout--); in paxb_gen3_serdes_init()
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/rk3399_ARM-atf/plat/mediatek/drivers/spmi/
H A Dspmi_common.c100 uint8_t rdata = 0; in spmi_ext_register_readl_field() local
103 dev->slvid, addr, &rdata, 1); in spmi_ext_register_readl_field()
105 *buf = (rdata >> shift) & mask; in spmi_ext_register_readl_field()
162 unsigned int rdata = 0x0; in spmi_ctrl_op_st() local
181 rdata = mmio_read_32(spmi_op_st_sta_addr); in spmi_ctrl_op_st()
182 SPMI_INFO("%s 0x%x\n", __func__, rdata); in spmi_ctrl_op_st()
184 if (((rdata >> 0x1) & SPMI_OP_ST_NACK) == SPMI_OP_ST_NACK) { in spmi_ctrl_op_st()
185 SPMI_ERR("SPMI_OP_ST_NACK occurs! OP_ST_STA = 0x%x\n", rdata); in spmi_ctrl_op_st()
188 } while ((rdata & SPMI_OP_ST_BUSY) == SPMI_OP_ST_BUSY); in spmi_ctrl_op_st()
/rk3399_ARM-atf/plat/mediatek/drivers/rtc/
H A Drtc_common.c21 uint32_t rdata = 0; in RTC_Read() local
23 pwrap_read((uint32_t)addr, &rdata); in RTC_Read()
24 return (uint16_t)rdata; in RTC_Read()
/rk3399_ARM-atf/plat/mediatek/drivers/pmic/mt6363/
H A Dmt6363_psc.c27 uint8_t rdata = 0; in mt6363_psc_read_field() local
34 ret = spmi_ext_register_readl(sdev, reg, &rdata, 1); in mt6363_psc_read_field()
38 rdata &= (mask << shift); in mt6363_psc_read_field()
39 *val = (rdata >> shift); in mt6363_psc_read_field()
/rk3399_ARM-atf/plat/mediatek/drivers/spmi/mt8196/
H A Dplatform_pmif_spmi.c253 uint8_t rdata = 0; in spmi_read_check() local
255 spmi_ext_register_readl(dev, dev->hwcid_addr, &rdata, 1); in spmi_read_check()
258 if ((rdata & dev->hwcid_mask) == (dev->hwcid_val & dev->hwcid_mask)) in spmi_read_check()
260 dev->slvid, rdata); in spmi_read_check()
263 dev->slvid, rdata); in spmi_read_check()
265 if (rdata == dev->hwcid_val) in spmi_read_check()
267 dev->slvid, rdata); in spmi_read_check()
270 dev->slvid, rdata); in spmi_read_check()
/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_clock_manager.c74 uint32_t rdata = 0; in pll_source_sync_read() local
89 rdata = mmio_read_32(pll_mem_offset + 0x4); in pll_source_sync_read()
90 INFO("rdata (%x) = %x\n", pll_mem_offset + 0x4, rdata); in pll_source_sync_read()
92 return rdata; in pll_source_sync_read()
98 uint32_t drefclk_div, refclk_div, rdata; in config_clkmgr_handoff() local
204 rdata = pll_source_sync_read(CLKMGR_MAINPLL + in config_clkmgr_handoff()
207 rdata | 0x80); in config_clkmgr_handoff()
209 rdata = pll_source_sync_read(CLKMGR_PERPLL + CLKMGR_PERPLL_MEM); in config_clkmgr_handoff()
211 rdata | 0x80); in config_clkmgr_handoff()
/rk3399_ARM-atf/plat/mediatek/drivers/pmic/mt8196/
H A Dpmic_shutdown_cfg.c164 uint16_t rdata; in mt6316_key_lock_check() local
176 rdata = work_val[0] | (work_val[1] << 8); in mt6316_key_lock_check()
178 if (rdata != 0) { in mt6316_key_lock_check()
180 , __func__, key, rdata); in mt6316_key_lock_check()
/rk3399_ARM-atf/plat/mediatek/drivers/pmic_wrap/mt8189/
H A Dpmic_wrap_init.h23 uint32_t rdata; member
/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_clock_manager.c178 uint32_t *rdata, int retry_count) in pll_source_sync_read() argument
192 *rdata = 0; in pll_source_sync_read()
199 *rdata = mmio_read_32(CLKMGR_MAINPLL(MEMSTAT)); in pll_source_sync_read()
201 *rdata = mmio_read_32(CLKMGR_PERPLL(MEMSTAT)); in pll_source_sync_read()
209 uint32_t rdata; in config_pll_pd_state() local
212 (void)pll_source_sync_read(pll_type, pll_cfg_set[i].addr, &rdata, in config_pll_pd_state()
216 ((rdata & ~pll_cfg_set[i].mask) | pll_cfg_set[i].data), in config_pll_pd_state()
/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/pmic/
H A Dpmic_wrap_init.h14 int32_t pwrap_read(uint32_t adr, uint32_t *rdata);
/rk3399_ARM-atf/plat/mediatek/mt8173/drivers/pmic/
H A Dpmic_wrap_init.h13 int32_t pwrap_read(uint32_t adr, uint32_t *rdata);
/rk3399_ARM-atf/lib/compiler-rt/builtins/
H A Dassembly.h68 #define CONST_SECTION .section .rdata,"rd"