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Searched refs:pwr_ctrl (Results 1 – 25 of 66) sorted by relevance

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/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv3_2/
H A Dmt_smp.c25 struct cpu_pwr_ctrl *pwr_ctrl) in mt_smp_core_init_arch() argument
28 CPU_PM_ASSERT(pwr_ctrl != NULL); in mt_smp_core_init_arch()
32 mmio_setbits_32(pwr_ctrl->arch_addr, 1 << (16 + cpu)); in mt_smp_core_init_arch()
34 mmio_clrbits_32(pwr_ctrl->arch_addr, 1 << (16 + cpu)); in mt_smp_core_init_arch()
38 void mt_smp_core_bootup_address_set(struct cpu_pwr_ctrl *pwr_ctrl, uintptr_t entry) in mt_smp_core_bootup_address_set() argument
40 CPU_PM_ASSERT(pwr_ctrl != NULL); in mt_smp_core_bootup_address_set()
43 mmio_write_32(pwr_ctrl->rvbaraddr_l, entry); in mt_smp_core_bootup_address_set()
46 int mt_smp_power_core_on(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl) in mt_smp_power_core_on() argument
51 CPU_PM_ASSERT(pwr_ctrl); in mt_smp_power_core_on()
54 pwpr_reg = pwr_ctrl->pwpr_intermediate; in mt_smp_power_core_on()
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H A Dmt_smp.h26 struct cpu_pwr_ctrl *pwr_ctrl);
27 void mt_smp_core_bootup_address_set(struct cpu_pwr_ctrl *pwr_ctrl, uintptr_t entry);
28 int mt_smp_power_core_on(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl);
29 int mt_smp_power_core_off(struct cpu_pwr_ctrl *pwr_ctrl);
H A Dmt_cpu_pm.c72 struct cpu_pwr_ctrl pwr_ctrl; in cpupm_cpu_pwr_on_prepare() local
74 PER_CPU_PWR_CTRL(pwr_ctrl, cpu); in cpupm_cpu_pwr_on_prepare()
75 mt_smp_core_bootup_address_set(&pwr_ctrl, entry); in cpupm_cpu_pwr_on_prepare()
76 mt_smp_core_init_arch(0, cpu, 1, &pwr_ctrl); in cpupm_cpu_pwr_on_prepare()
78 return mt_smp_power_core_on(cpu, &pwr_ctrl); in cpupm_cpu_pwr_on_prepare()
94 struct cpu_pwr_ctrl pwr_ctrl; in cpupm_cpu_suspend_smp() local
98 PER_CPU_PWR_CTRL(pwr_ctrl, state->info.cpuid); in cpupm_cpu_suspend_smp()
99 mt_smp_power_core_off(&pwr_ctrl); in cpupm_cpu_suspend_smp()
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/
H A Dmt_smp.c27 struct cpu_pwr_ctrl *pwr_ctrl) in mt_smp_core_init_arch() argument
30 CPU_PM_ASSERT(pwr_ctrl); in mt_smp_core_init_arch()
34 mmio_setbits_32(pwr_ctrl->arch_addr, in mt_smp_core_init_arch()
37 mmio_clrbits_32(pwr_ctrl->arch_addr, in mt_smp_core_init_arch()
44 struct cpu_pwr_ctrl *pwr_ctrl, in mt_smp_core_bootup_address_set() argument
47 CPU_PM_ASSERT(pwr_ctrl); in mt_smp_core_bootup_address_set()
50 mmio_write_32(pwr_ctrl->rvbaraddr_l, entry); in mt_smp_core_bootup_address_set()
51 mmio_write_32(pwr_ctrl->rvbaraddr_h, 0); in mt_smp_core_bootup_address_set()
54 int mt_smp_power_core_on(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl) in mt_smp_power_core_on() argument
58 CPU_PM_ASSERT(pwr_ctrl); in mt_smp_power_core_on()
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H A Dmt_smp.h32 struct cpu_pwr_ctrl *pwr_ctrl);
37 struct cpu_pwr_ctrl *pwr_ctrl,
40 int mt_smp_power_core_on(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl);
41 int mt_smp_power_core_off(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl);
45 int mt_smp_cluster_pwpr_init(struct cluster_pwr_ctrl *pwr_ctrl);
46 int mt_smp_cluster_pwpr_op_init(struct cluster_pwr_ctrl *pwr_ctrl);
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_internal.h112 struct pwr_ctrl { struct
522 struct pwr_ctrl *pwrctrl;
530 extern void __spm_src_req_update(const struct pwr_ctrl *pwrctrl,
532 extern void __spm_set_power_control(const struct pwr_ctrl *pwrctrl);
534 extern void __spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl);
535 extern void __spm_kick_pcm_to_run(struct pwr_ctrl *pwrctrl);
536 extern void __spm_set_pcm_flags(struct pwr_ctrl *pwrctrl);
544 __spm_sync_vcore_dvfs_power_control(struct pwr_ctrl *dest_pwr_ctrl,
545 const struct pwr_ctrl *src_pwr_ctrl);
548 extern void __spm_set_fw_resume_option(struct pwr_ctrl *pwrctrl);
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H A Dmt_spm_conservation.h19 extern void spm_conservation_pwrctrl_init(struct pwr_ctrl *pwrctrl);
H A Dmt_spm_conservation.c26 struct pwr_ctrl *pwrctrl; in go_to_spm_before_wfi()
140 void spm_conservation_pwrctrl_init(struct pwr_ctrl *pwrctrl) in spm_conservation_pwrctrl_init()
H A Dmt_spm_vcorefs.c80 static struct pwr_ctrl vcorefs_ctrl = {
381 void __spm_sync_vcore_dvfs_power_control(struct pwr_ctrl *dest_pwr_ctrl, in __spm_sync_vcore_dvfs_power_control()
382 const struct pwr_ctrl *src_pwr_ctrl) in __spm_sync_vcore_dvfs_power_control()
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_internal.h112 struct pwr_ctrl { struct
576 struct pwr_ctrl *pwrctrl;
584 extern void __spm_src_req_update(const struct pwr_ctrl *pwrctrl,
586 extern void __spm_set_power_control(const struct pwr_ctrl *pwrctrl);
588 extern void __spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl);
589 extern void __spm_kick_pcm_to_run(struct pwr_ctrl *pwrctrl);
590 extern void __spm_set_pcm_flags(struct pwr_ctrl *pwrctrl);
598 __spm_sync_vcore_dvfs_power_control(struct pwr_ctrl *dest_pwr_ctrl,
599 const struct pwr_ctrl *src_pwr_ctrl);
602 extern void __spm_set_fw_resume_option(struct pwr_ctrl *pwrctrl);
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H A Dmt_spm_conservation.h19 extern void spm_conservation_pwrctrl_init(struct pwr_ctrl *pwrctrl);
H A Dmt_spm_conservation.c27 struct pwr_ctrl *pwrctrl; in go_to_spm_before_wfi()
140 void spm_conservation_pwrctrl_init(struct pwr_ctrl *pwrctrl) in spm_conservation_pwrctrl_init()
H A Dmt_spm_vcorefs.c95 static struct pwr_ctrl vcorefs_ctrl = {
293 void __spm_sync_vcore_dvfs_power_control(struct pwr_ctrl *dest_pwr_ctrl, in __spm_sync_vcore_dvfs_power_control()
294 const struct pwr_ctrl *src_pwr_ctrl) in __spm_sync_vcore_dvfs_power_control()
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_internal.h105 struct pwr_ctrl { struct
557 struct pwr_ctrl *pwrctrl;
566 extern void __spm_src_req_update(const struct pwr_ctrl *pwrctrl,
568 extern void __spm_set_power_control(const struct pwr_ctrl *pwrctrl);
570 extern void __spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl);
571 extern void __spm_kick_pcm_to_run(struct pwr_ctrl *pwrctrl);
572 extern void __spm_set_pcm_flags(struct pwr_ctrl *pwrctrl);
580 extern void __spm_sync_vcore_dvfs_power_control(struct pwr_ctrl *dest_pwr_ctrl,
581 const struct pwr_ctrl *src_pwr_ctrl);
584 extern void __spm_set_fw_resume_option(struct pwr_ctrl *pwrctrl);
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H A Dmt_spm_conservation.h19 extern void spm_conservation_pwrctrl_init(struct pwr_ctrl *pwrctrl);
H A Dmt_spm_conservation.c30 struct pwr_ctrl *pwrctrl; in go_to_spm_before_wfi()
152 void spm_conservation_pwrctrl_init(struct pwr_ctrl *pwrctrl) in spm_conservation_pwrctrl_init()
/rk3399_ARM-atf/plat/mediatek/mt8173/drivers/spm/
H A Dspm.h211 struct pwr_ctrl { struct
275 struct pwr_ctrl *pwrctrl;
291 static inline void set_pwrctrl_pcm_flags(struct pwr_ctrl *pwrctrl, in set_pwrctrl_pcm_flags()
302 static inline void set_pwrctrl_pcm_data(struct pwr_ctrl *pwrctrl, in set_pwrctrl_pcm_data()
311 void spm_set_power_control(const struct pwr_ctrl *pwrctrl);
312 void spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl);
316 void spm_kick_pcm_to_run(struct pwr_ctrl *pwrctrl);
H A Dspm_hotplug.c186 static struct pwr_ctrl hotplug_ctrl = {
208 struct pwr_ctrl *pwrctrl = spm_hotplug.pwrctrl; in spm_go_to_hotplug()
H A Dspm_suspend.c214 static struct pwr_ctrl spm_ctrl = {
244 struct pwr_ctrl *pwrctrl; in go_to_sleep_before_wfi()
H A Dspm_mcdi.c219 static struct pwr_ctrl mcdi_ctrl = {
453 struct pwr_ctrl *pwrctrl = spm_mcdi.pwrctrl; in spm_mcdi_prepare_for_mtcmos()
471 struct pwr_ctrl *pwrctrl = spm_mcdi.pwrctrl; in spm_mcdi_prepare_for_off_state()
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_internal.h66 struct pwr_ctrl { struct
783 struct pwr_ctrl *pwrctrl;
795 void __spm_set_power_control(const struct pwr_ctrl *pwrctrl,
797 void __spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl);
798 void __spm_kick_pcm_to_run(struct pwr_ctrl *pwrctrl);
799 void __spm_set_pcm_flags(struct pwr_ctrl *pwrctrl);
806 void __spm_sync_vcore_dvfs_power_control(struct pwr_ctrl *dest_pwr_ctrl,
807 const struct pwr_ctrl *src_pwr_ctrl);
812 void __spm_set_fw_resume_option(struct pwr_ctrl *pwrctrl);
815 static inline void set_pwrctrl_pcm_flags(struct pwr_ctrl *pwrctrl, in set_pwrctrl_pcm_flags()
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/rk3399_ARM-atf/plat/mediatek/lib/pm/armv8_2/
H A Drules.mk10 LOCAL_SRCS-y := ${LOCAL_DIR}/pwr_ctrl.c
/rk3399_ARM-atf/plat/mediatek/lib/pm/armv9_0/
H A Drules.mk11 LOCAL_SRCS-y := ${LOCAL_DIR}/pwr_ctrl.c
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_internal.h126 struct pwr_ctrl { struct
648 struct pwr_ctrl *pwrctrl;
652 void __spm_src_req_update(const struct pwr_ctrl *pwrctrl, unsigned int resource_usage);
653 void __spm_set_power_control(const struct pwr_ctrl *pwrctrl);
654 void __spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl);
655 void __spm_set_pcm_flags(struct pwr_ctrl *pwrctrl);
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_internal.h57 struct pwr_ctrl { struct
1069 struct pwr_ctrl *pwrctrl;
1078 void __spm_set_power_control(const struct pwr_ctrl *pwrctrl,
1080 void __spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl);
1081 void __spm_kick_pcm_to_run(struct pwr_ctrl *pwrctrl);
1082 void __spm_set_pcm_flags(struct pwr_ctrl *pwrctrl);
1090 void __spm_sync_vcore_dvfs_power_control(struct pwr_ctrl *dest_pwr_ctrl,
1091 const struct pwr_ctrl *src_pwr_ctrl);
1098 void __spm_set_fw_resume_option(struct pwr_ctrl *pwrctrl);
1101 static inline void set_pwrctrl_pcm_flags(struct pwr_ctrl *pwrctrl, in set_pwrctrl_pcm_flags()
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