Searched refs:mmio_read_32_poll_timeout (Results 1 – 7 of 7) sorted by relevance
| /rk3399_ARM-atf/drivers/nxp/ddr/s32cc/ |
| H A D | ddr_utils.c | 91 err = mmio_read_32_poll_timeout(DDRC_BASE + OFFSET_DDRC_SWSTAT, swstat_reg, in set_axi_parity()
105 err = mmio_read_32_poll_timeout(DDRC_BASE + OFFSET_DDRC_SWSTAT, swstat_reg, in set_axi_parity()
145 err = mmio_read_32_poll_timeout(DDR_PHYA_MASTER0_CALBUSY, calbusy_reg, in post_train_setup()
155 err = mmio_read_32_poll_timeout(DDRC_BASE + OFFSET_DDRC_SWSTAT, swctl_reg, in post_train_setup()
167 err = mmio_read_32_poll_timeout(DDRC_BASE + OFFSET_DFIPHYMSTR, phymstr_reg, in post_train_setup()
176 err = mmio_read_32_poll_timeout(DDRC_BASE + OFFSET_DDRC_STAT, phymstr_reg, in post_train_setup()
192 err = mmio_read_32_poll_timeout(DDRC_BASE + OFFSET_DDRC_SWSTAT, swstat_reg, in post_train_setup()
201 err = mmio_read_32_poll_timeout(DDRC_BASE + OFFSET_DDRC_DFISTAT, dfistat_reg, in post_train_setup()
211 err = mmio_read_32_poll_timeout(DDRC_BASE + OFFSET_DDRC_SWSTAT, swctl_reg, in post_train_setup()
226 err = mmio_read_32_poll_timeout(DDRC_BASE + OFFSET_DFIPHYMSTR, phymstr_reg, in post_train_setup()
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| /rk3399_ARM-atf/drivers/imx/usdhc/ |
| H A D | imx_usdhc.c | 132 ret = mmio_read_32_poll_timeout(reg_base + PSTATE, pstate, in imx_usdhc_set_clk()
161 ret = mmio_read_32_poll_timeout(reg_base + SYSCTRL, sysctrl, in imx_usdhc_initialize()
283 err = mmio_read_32_poll_timeout(reg_base + PSTATE, pstate, in imx_usdhc_send_cmd()
291 err = mmio_read_32_poll_timeout(reg_base + PSTATE, pstate, in imx_usdhc_send_cmd()
324 err = mmio_read_32_poll_timeout(reg_base + INTSTAT, intstat, in imx_usdhc_send_cmd()
355 err = mmio_read_32_poll_timeout(reg_base + INTSTAT, intstat, in imx_usdhc_send_cmd()
375 ret = mmio_read_32_poll_timeout(reg_base + SYSCTRL, sysctrl, in imx_usdhc_send_cmd()
384 ret = mmio_read_32_poll_timeout(reg_base + SYSCTRL, sysctrl, in imx_usdhc_send_cmd()
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| /rk3399_ARM-atf/include/lib/ |
| H A D | mmio_poll.h | 42 #define mmio_read_32_poll_timeout(addr, val, cond, timeout_us) \ macro
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| /rk3399_ARM-atf/drivers/nxp/clk/s32cc/ |
| H A D | mc_rgm.c | 105 err = mmio_read_32_poll_timeout(MC_RGM_PSTAT(MC_RGM_BASE_ADDR, 0U), pstat, in mc_rgm_ddr_reset()
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| /rk3399_ARM-atf/plat/mediatek/drivers/thermal/src/ |
| H A D | thermal_lvts.c | 41 ret = mmio_read_32_poll_timeout( in lvts_write_data_check()
86 ret = mmio_read_32_poll_timeout( in lvts_write_device()
110 ret = mmio_read_32_poll_timeout( in lvts_read_device()
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| /rk3399_ARM-atf/drivers/st/mce/ |
| H A D | stm32_mce.c | 249 return mmio_read_32_poll_timeout((MCE_BASE + MCE_SR), mce_sr, in stm32_mce_write_master_key()
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| /rk3399_ARM-atf/plat/mediatek/drivers/thermal/mt8189/ |
| H A D | soc_temp_lvts.c | 355 ret = mmio_read_32_poll_timeout( in mt8189_device_read_count_rc_n()
390 ret = mmio_read_32_poll_timeout( in mt8189_device_read_count_rc_n()
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