| /rk3399_ARM-atf/plat/mediatek/mt8173/include/ |
| H A D | mt8173_def.h | 118 #define mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
119 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
121 #define mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
122 (((lvl0_state) << PSTATE_ID_SHIFT) | \
129 #define mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
131 mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
135 lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ argument
137 mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
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| /rk3399_ARM-atf/plat/qti/common/src/ |
| H A D | qti_pm.c | 34 #define qti_make_pwrstate_lvl0(lvl0_state, type) \ argument
35 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
38 #define qti_make_pwrstate_lvl1(lvl1_state, lvl0_state, type) \ argument
40 qti_make_pwrstate_lvl0(lvl0_state, type))
43 #define qti_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, type) \ argument
45 qti_make_pwrstate_lvl1(lvl1_state, lvl0_state, type))
48 #define qti_make_pwrstate_lvl3(lvl3_state, lvl2_state, lvl1_state, lvl0_state, type) \ argument
50 qti_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, type))
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| /rk3399_ARM-atf/plat/qemu/qemu_sbsa/ |
| H A D | sbsa_pm.c | 36 #define qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
37 (((lvl0_state) << PSTATE_ID_SHIFT) | \
40 #define qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
41 (((lvl0_state) << PSTATE_ID_SHIFT) | \
47 #define qemu_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
49 qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
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| /rk3399_ARM-atf/plat/qemu/common/ |
| H A D | qemu_pm.c | 29 #define qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
30 (((lvl0_state) << PSTATE_ID_SHIFT) | \
33 #define qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
34 (((lvl0_state) << PSTATE_ID_SHIFT) | \
40 #define qemu_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
42 qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
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| /rk3399_ARM-atf/plat/rpi/common/ |
| H A D | rpi3_pm.c | 43 #define rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
44 (((lvl0_state) << PSTATE_ID_SHIFT) | \
49 #define rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
50 (((lvl0_state) << PSTATE_ID_SHIFT) | \
56 #define rpi3_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
58 rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
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| /rk3399_ARM-atf/plat/nuvoton/npcm845x/ |
| H A D | npcm845x_psci.c | 29 #define npcm845x_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
30 (((lvl0_state) << PSTATE_ID_SHIFT) | \
33 #define npcm845x_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
34 (((lvl0_state) << PSTATE_ID_SHIFT) | \
39 #define npcm845x_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
41 npcm845x_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
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| /rk3399_ARM-atf/include/plat/arm/common/ |
| H A D | plat_arm.h | 165 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
166 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
168 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
169 (((lvl0_state) << PSTATE_ID_SHIFT) | \
175 #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
177 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
180 #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ argument
182 arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
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| /rk3399_ARM-atf/plat/mediatek/mt8183/ |
| H A D | plat_pm.c | 53 #define mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
54 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
58 #define mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
59 (((lvl0_state) << PSTATE_ID_SHIFT) | \
66 #define mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
68 mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
72 lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ argument
74 mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
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