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/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_ddr.c200 uint32_t lower, upper; in sdram_set_firewall_non_f2sdram() local
216 lower = LO(value); in sdram_set_firewall_non_f2sdram()
219 FW_MPU_DDR_SCR_WRITEL(lower, in sdram_set_firewall_non_f2sdram()
227 FW_MPU_DDR_SCR_WRITEL(lower, in sdram_set_firewall_non_f2sdram()
237 lower = LO(value); in sdram_set_firewall_non_f2sdram()
240 FW_MPU_DDR_SCR_WRITEL(lower, in sdram_set_firewall_non_f2sdram()
248 FW_MPU_DDR_SCR_WRITEL(lower, in sdram_set_firewall_non_f2sdram()
264 uint32_t lower, upper; in sdram_set_firewall_f2sdram() local
279 lower = LO(value); in sdram_set_firewall_f2sdram()
281 FW_F2SDRAM_DDR_SCR_WRITEL(lower, in sdram_set_firewall_f2sdram()
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/rk3399_ARM-atf/docs/components/
H A Dras.rst64 to lower EL. This happens when there is an error (EA) in the system which is not yet
65 signaled to PE while executing at lower EL. During entry into EL3 the errors (EA) are
71 During entry to EL3 from lower EL, if there is any pending async EAs they are either
72 reflected back to lower EL (KFH) or handled in EL3 itself (FFH).
82 * The handler reflects pending async EAs back to the lower EL if the EA routing model is KFH
84 relative to an EL3/secure interrupt is lower, repeated back-and-forth transitions between
85 lower EL and EL3 can occur.
87 To prevent infinite cycling between EL3 and lower EL, a loop counter (``CTX_NESTED_EA_FLAG``) and
97 FEAT_E3DSE provides a mechanism for EL3 to inject a virtual SError into lower exception levels.
99 and then inject the delegated SError to the appropriate lower EL before returning, thereby
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H A Dexception-handling.rst12 |TF-A|'s handling of synchronous ``SMC`` exceptions raised from lower ELs is
62 rest of the handling to a dedicated software stack running at lower Secure
66 processing of the error to dedicated software stack running at lower secure
108 executing in EL3, or has delegated the execution to a lower EL. For interrupts,
122 and involves GIC priority masking, it's impossible for a lower priority
124 lower priority dispatcher cannot preempt a higher-priority one. Priority
126 explicit. The |EHF| therefore disallows for lower priority level to be activated
128 Likewise, a panic would result if it's attempted to deactivate a lower priority
202 priority of delegated execution in lower ELs. Delegated execution in lower EL is
205 masked while executing in a lower EL, therefore controls preemption of delegated
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H A Darm-sip-service.rst36 Execution State Switching service provides a mechanism for a non-secure lower
61 The parameters *PC hi* and *PC lo* defines upper and lower words, respectively,
H A Dcontext-management-library.rst27 to preserve the state of the CPU at the next lower exception level (EL) in a given
76 1. **EL3 should only initialize immediate used lower EL**
79 immediate used lower EL. This implies that, when S-EL2 is present in the system,
102 for lower exception levels.
241 corresponding registers from lower exception levels. Because debug and
453 lower exception levels of Secure and Realm worlds. In this scenario, we save the
454 general purpose and Pauth registers while we enter EL3 from lower ELs via
455 ``prepare_el3_entry`` and restore them back while we exit EL3 to lower ELs
526 values to lower exception levels when traps occur. The cached values stored in
543 lower exception levels NS(EL2/EL1) will carry forward those values to EL3.
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H A Dffa-manifest-binding.rst375 - A list of (id, mpdir upper bits, mpidr lower bits) tuples describing which
382 - mpidr lower bits: The <u32> describing the lower bits of the 64 bits
H A Dven-el3-debugfs.rst335 minor version in lower 16 bits.
H A Dsecure-partition-manager.rst220 When SPMC resides at a lower EL i.e., S-EL1 or S-EL2, it is loaded by BL2 as the
H A Dnuma-per-cpu.rst14 memory, and CPUs within a node can access this memory with lower latency than
/rk3399_ARM-atf/tools/memory/src/memory/
H A Dmapparser.py30 region, _, attr = symbol.lower().strip("__").split("_")
H A Delfparser.py152 region, _, attr = symbol.lower().strip("__").split("_")
/rk3399_ARM-atf/plat/allwinner/common/
H A Darisc_off.S20 # r3, so to be patched in the lower 16 bits of the first instruction,
92 l.srli r6, r3, 16 # move mask to lower 16 bits(ds)
/rk3399_ARM-atf/docs/getting_started/
H A Dbuild-internals.rst17 handling (FFH) of External aborts and SError interrupts originating from lower
H A Dbuild-options.rst218 general, it is recommended to perform SVE context management in lower ELs
391 enables trapping of ID register reads by lower ELs to EL3. This allows EL3
392 to control the feature visibility to lower ELs by returning a sanitized value
399 This feature traps all lower EL accesses to Group 3 and Group 5
536 lower privilege software. It is an optional architectural feature from v9.0
547 - ``ENABLE_FEAT_MPAM``: Numeric value to enable lower ELs to use MPAM
554 mechanism. When this option is set to ``1`` or ``2``, EL3 allows lower ELs to
692 injection from lower ELs, and this build option enables lower ELs to use
775 implementation defined system register accesses from lower ELs. Default
778 - ``INVERTED_MEMMAP``: memmap tool print by default lower addresses at the
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H A Drt-svc-writers-guide.rst11 levels lower than EL3 will request runtime services using the Secure Monitor
/rk3399_ARM-atf/docs/
H A Darchitecture_features.rst6 at EL3, some demand explicit configuration of EL3 control registers to enable their use at lower
492 c) EL3 wants to hide a feature from lower ELs (eg. with ``FEAT_IDTE3``)
541 for lower ELs, access must be enabled for at least NS world, preferably all
573 be done if there are observable effects from lower ELs like register traps. It
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-7.rst80 lower exception levels to temporarily disable the mitigation in their execution
82 on entry to EL3, and restores the mitigation state of the lower exception level
H A Dsecurity-advisory-tfv-8.rst27 restore it before returning into the lower exception level software that called
/rk3399_ARM-atf/make_helpers/
H A Dutilities.mk46 uppercase = $(shell echo $(call escape-shell,$(1)) | tr '[:lower:]' '[:upper:]')
60 lowercase = $(shell echo $(call escape-shell,$(1)) | tr '[:upper:]' '[:lower:]')
/rk3399_ARM-atf/docs/process/
H A Dcommit-style.rst40 called subject by the commitlint checker) must be lower case.
/rk3399_ARM-atf/docs/design/
H A Dinterrupt-framework-design.rst20 exception levels lower than EL3. This could be done with or without the
67 state prior to entry into a lower exception level in that security state.
324 #. Security state, bit[0]. This bit indicates the security state of the lower
370 prior to entry into a lower exception level in either security state. The
629 lower exception level using AArch64 or AArch32 are handled.
678 #. Calling ``el3_exit()`` to return from EL3 into a lower exception level in
737 lower exception level.
H A Dfirmware-design.rst820 levels lower than EL3 will request runtime services using the Secure Monitor
955 Function ID is passed in W0 from the lower exception level (as per the
1201 - SError : "plat_handle_el3_ea" Except for special handling of lower EL's SError exception
1202 which gets triggered in EL3 when PSTATE.A is unmasked. Its only applicable when lower
1208 Applies to all the exceptions in both AArch64/AArch32 mode of lower EL.
1210 Before handling any lower EL exception, we synchronize the errors at EL3 entry to ensure
1211 that any errors pertaining to lower EL is isolated/identified. If we continue without
1214 in lower EL but exception happened in EL3.
1222 - KFH : Reflect it back to lower EL using **reflect_pending_async_ea_to_lower_el()**
1228 After synchronizing and handling lower EL SErrors, unmask EA (PSTATE.A) to ensure
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/rk3399_ARM-atf/docs/threat_model/
H A Dsupply_chain_threat_model.rst313 | | contributor is lower. However, even though unlikely, it |
365 | | dependencies is lower than external dependencies for the |
444 | | is lower than that of a maintainer’s (assuming both use |
/rk3399_ARM-atf/docs/perf/
H A Dpsci-performance-juno.rst423 The ``PSCI_EXIT`` times are generally lower than in the last test because the
/rk3399_ARM-atf/docs/plat/nxp/
H A Dnxp-layerscape.rst60 applications with BOM optimizations for economic low layer PCB, lower cost

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