| /rk3399_ARM-atf/plat/rpi/common/ |
| H A D | rpi_pci_svc.c | 47 uint32_t seg, bus, dev, fun; in pci_segment_lib_get_base() local
58 bus = PCI_ADDR_BUS(address); in pci_segment_lib_get_base()
63 if ((bus == 0U) && ((dev > 0U) || (fun > 0U))) { in pci_segment_lib_get_base()
68 if ((bus == 1U) && (dev > 0U)) { in pci_segment_lib_get_base()
72 if (bus > 0) { in pci_segment_lib_get_base()
|
| /rk3399_ARM-atf/plat/mediatek/drivers/iommu/ |
| H A D | mtk_iommu_smc.c | 31 #define MMU_AXI_FAULT_STATUS(bus) (0x13c + (bus) * 8) argument
32 #define MMU_AXI_INVLD_PA(bus) (0x140 + (bus) * 8) argument
33 #define MMU_AXI_INT_ID(bus) (0x150 + (bus) * 4) argument
|
| /rk3399_ARM-atf/drivers/qti/accesscontrol/vmidmt/ |
| H A D | vmidmt_hal.c | 105 static uint32_t set_default_config_bus(struct hal_vmidmt_bus_attrib *bus) in set_default_config_bus() argument
109 if (bus->e_wacfg < HAL_VMIDMT_WACFG_DEFAULT) in set_default_config_bus()
110 attrib |= bus->e_wacfg << VMIDMT_SHFT(CR0, WACFG); in set_default_config_bus()
112 if (bus->e_racfg < HAL_VMIDMT_RACFG_DEFAULT) in set_default_config_bus()
113 attrib |= bus->e_racfg << VMIDMT_SHFT(CR0, RACFG); in set_default_config_bus()
115 if (bus->e_shcfg < HAL_VMIDMT_SHCFG_DEFAULT) in set_default_config_bus()
116 attrib |= bus->e_shcfg << VMIDMT_SHFT(CR0, SHCFG); in set_default_config_bus()
118 if (bus->e_mtcfg < HAL_VMIDMT_MTCFG_DEFAULT) in set_default_config_bus()
119 attrib |= bus->e_mtcfg << VMIDMT_SHFT(CR0, MTCFG); in set_default_config_bus()
121 attrib |= bus->mem_attr << VMIDMT_SHFT(CR0, MEMATTR); in set_default_config_bus()
[all …]
|
| /rk3399_ARM-atf/fdts/ |
| H A D | rtsm_ve-motherboard.dtsi | 43 compatible = "arm,vexpress,config-bus";
81 bus@8000000 {
82 compatible = "simple-bus";
87 motherboard-bus@8000000 {
88 compatible = "arm,vexpress,v2m-p1", "simple-bus";
111 iofpga-bus@300000000 {
112 compatible = "simple-bus";
|
| H A D | stm32mp21-bl31.dtsi | 10 bus@42080000 {
|
| H A D | stm32mp157c-lxa-mc1.dts | 52 bus-width = <4>;
79 bus-width = <8>;
|
| H A D | stm32mp15xx-dhcor-avenger96.dtsi | 44 bus-width = <4>;
53 bus-width = <8>;
|
| H A D | stm32mp21-bl2.dtsi | 11 bus@42080000 {
19 bus@42080000 {
|
| H A D | stm32mp15xx-dhcom-som.dtsi | 190 spi-rx-bus-width = <4>;
329 bus-width = <4>;
336 * SD bus pull-up resistors:
355 bus-width = <8>;
|
| H A D | stm32mp151a-prtt1a.dts | 54 spi-rx-bus-width = <4>;
198 bus-width = <4>;
219 bus-width = <8>;
|
| H A D | stm32mp157c-odyssey.dts | 31 bus-width = <4>;
|
| H A D | n1sdp.dtsi | 85 compatible = "arm,neoverse-n1-soc", "simple-bus";
159 bus-range = <0 17>;
182 bus-range = <0 17>;
|
| H A D | stm32mp157c-ev1-sp_min.dts | 52 spi-rx-bus-width = <4>;
|
| H A D | stm32mp157c-ev1.dts | 53 spi-rx-bus-width = <4>;
|
| H A D | stm32mp257d-ultra-fly-sbc.dts | 163 bus-width = <4>;
176 bus-width = <8>;
|
| H A D | stm32mp257f-ev1.dts | 180 bus-width = <4>;
191 bus-width = <8>;
|
| H A D | stm32mp257f-dk.dts | 186 bus-width = <4>;
199 bus-width = <8>;
|
| H A D | stm32mp235f-dk.dts | 203 bus-width = <4>;
216 bus-width = <8>;
|
| H A D | fvp-ve-Cortex-A7x1.dts | 79 bus@8000000 {
|
| H A D | stm32mp157c-ed1.dts | 299 bus-width = <4>;
315 bus-width = <8>;
|
| /rk3399_ARM-atf/docs/design_documents/ |
| H A D | dtpm_drivers.rst | 22 and hardware bus types in order to be compatible with different platforms.
24 and a specific hardware bus interface, such as |I2C| or |SPI|.
42 the appropriate bus type. It includes hardware link read and write functions
43 that use the platform bus interface to transfer commands.
|
| /rk3399_ARM-atf/drivers/brcm/spi/ |
| H A D | iproc_qspi.h | 100 int iproc_qspi_setup(uint32_t bus, uint32_t cs,
|
| /rk3399_ARM-atf/plat/rockchip/px30/drivers/pmu/ |
| H A D | pmu.c | 157 static inline uint32_t pmu_bus_idle_st(uint32_t bus) in pmu_bus_idle_st() argument
159 return !!((mmio_read_32(PMU_BASE + PMU_BUS_IDLE_ST) & BIT(bus)) && in pmu_bus_idle_st()
160 (mmio_read_32(PMU_BASE + PMU_BUS_IDLE_ST) & BIT(bus + 16))); in pmu_bus_idle_st()
163 static void pmu_bus_idle_req(uint32_t bus, uint32_t state) in pmu_bus_idle_req() argument
168 BITS_WITH_WMASK(state, 0x1, bus)); in pmu_bus_idle_req()
170 while (pmu_bus_idle_st(bus) != state && in pmu_bus_idle_req()
176 if (pmu_bus_idle_st(bus) != state) in pmu_bus_idle_req()
178 __func__, mmio_read_32(PMU_BASE + PMU_BUS_IDLE_ST), bus); in pmu_bus_idle_req()
|
| /rk3399_ARM-atf/plat/rockchip/rk3576/drivers/pmu/ |
| H A D | pmu.c | 402 void pmu_bus_idle_req(uint32_t bus, uint32_t state) in pmu_bus_idle_req() argument
406 mmio_write_32(PMU_BASE + PMU2_BUS_IDLE_SFTCON(bus / 16), in pmu_bus_idle_req()
407 BITS_WITH_WMASK(state, 0x1, bus % 16)); in pmu_bus_idle_req()
409 while (pmu_bus_idle_st(bus) != state || in pmu_bus_idle_req()
410 pmu_bus_idle_ack(bus) != state) { in pmu_bus_idle_req()
418 __func__, state, bus, in pmu_bus_idle_req()
|
| /rk3399_ARM-atf/docs/plat/marvell/armada/misc/ |
| H A D | mvebu-amb.rst | 7 transaction towards the CD BootROM, SPI0, SPI1 and Device bus (NOR).
|