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/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/
H A Dpmu.h72 #define SAVE_QOS(array, NAME) \ argument
73 RK3399_CPU_AXI_SAVE_QOS(array, CPU_AXI_##NAME##_QOS_BASE)
74 #define RESTORE_QOS(array, NAME) \ argument
75 RK3399_CPU_AXI_RESTORE_QOS(array, CPU_AXI_##NAME##_QOS_BASE)
77 #define RK3399_CPU_AXI_SAVE_QOS(array, base) do { \ argument
78 array[0] = mmio_read_32(base + CPU_AXI_QOS_ID_COREID); \
79 array[1] = mmio_read_32(base + CPU_AXI_QOS_REVISIONID); \
80 array[2] = mmio_read_32(base + CPU_AXI_QOS_PRIORITY); \
81 array[3] = mmio_read_32(base + CPU_AXI_QOS_MODE); \
82 array[4] = mmio_read_32(base + CPU_AXI_QOS_BANDWIDTH); \
[all …]
/rk3399_ARM-atf/plat/rockchip/px30/drivers/pmu/
H A Dpmu.h306 #define PX30_CPU_AXI_SAVE_QOS(array, base) do { \ argument
307 array[0] = mmio_read_32(base + CPU_AXI_QOS_ID_COREID); \
308 array[1] = mmio_read_32(base + CPU_AXI_QOS_REVISIONID); \
309 array[2] = mmio_read_32(base + CPU_AXI_QOS_PRIORITY); \
310 array[3] = mmio_read_32(base + CPU_AXI_QOS_MODE); \
311 array[4] = mmio_read_32(base + CPU_AXI_QOS_BANDWIDTH); \
312 array[5] = mmio_read_32(base + CPU_AXI_QOS_SATURATION); \
313 array[6] = mmio_read_32(base + CPU_AXI_QOS_EXTCONTROL); \
316 #define PX30_CPU_AXI_RESTORE_QOS(array, base) do { \ argument
317 mmio_write_32(base + CPU_AXI_QOS_ID_COREID, array[0]); \
[all …]
/rk3399_ARM-atf/tools/marvell/doimage/secure/
H A Dsec_img_8K.cfg5 # CSK keys array - 16 entries total.
14 # index of CSK key in the array. Valid range is 0 to 15
26 # SecureBootControl and EfuseBurnControl registers array
H A Dsec_img_7K.cfg5 # CSK keys array - 16 entries total.
14 # index of CSK key in the array. Valid range is 0 to 15
26 # SecureBootControl and EfuseBurnControl registers array
/rk3399_ARM-atf/lib/psa/
H A Dmeasured_boot.c18 static void print_byte_array(const uint8_t *array __unused, size_t len __unused) in print_byte_array()
23 if (array == NULL || len == 0U) { in print_byte_array()
27 (void)printf(" %02x", array[i]); in print_byte_array()
/rk3399_ARM-atf/include/drivers/st/
H A Dstm32mp_clkfunc.h23 uint32_t *array);
/rk3399_ARM-atf/docs/design/
H A Dpsci-pd-tree.rst55 removed. A platform must define an array of unsigned chars such that:
57 #. The first entry in the array specifies the number of power domains at the
65 #. The size of the array minus the first entry will be equal to the number of
68 #. The value in each entry in the array is used to find the number of entries
70 all the entries at a level specifies the number of entries in the array for
110 This tree is defined by the platform as the array described above as follows:
143 relationship allows the core nodes to be allocated in a separate array
145 core in the array is the same as the return value from these APIs.
275 The ``psci_non_cpu_pd_nodes`` array will be populated as follows. The value in
296 Each core can find its node in the ``psci_cpu_pd_nodes`` array using the
H A Dauth-framework.rst677 A CoT is defined as an array of pointers to ``auth_image_desc_t`` structures
695 This CoT consists of an array of pointers to image descriptors and it is
697 ``cot_desc`` must be the name of the array (passing a pointer or any other
722 CoT array, so the descriptors location in the array must match the identifiers.
743 - ``img_auth_methods``: this points to an array which defines the
771 - ``authenticated_data``: this array pointer indicates what authentication
943 is created in the ``authenticated_data`` array for that purpose. In that entry,
/rk3399_ARM-atf/drivers/st/clk/
H A Dstm32mp_clkfunc.c177 uint32_t *array) in fdt_rcc_read_uint32_array() argument
191 return fdt_read_uint32_array(fdt, node, prop_name, count, array); in fdt_rcc_read_uint32_array()
/rk3399_ARM-atf/common/
H A Dfdt_wrappers.c79 uint32_t array[2] = {0, 0}; in fdt_read_uint64() local
82 ret = fdt_read_uint32_array(dtb, node, prop_name, 2, array); in fdt_read_uint64()
87 *value = ((uint64_t)array[0] << 32) | array[1]; in fdt_read_uint64()
/rk3399_ARM-atf/drivers/tpm/
H A Dtpm2_cmds.c66 uint8_t array[4]; in tpm_update_buffer() member
102 buf->data[i] = tpm_new_data.array[j]; in tpm_update_buffer()
/rk3399_ARM-atf/docs/components/
H A Dgranule-protection-tables-design.rst110 The programmer should provide the API with an array containing ``pas_region_t``
177 #. Firmware must call ``gpt_init_pas_l1_tables`` with a pointer to an array of
185 The base address of bitlocks array and its size are provided to this function
238 * The platform allocates the bitlock array which contains fine-grained
239 ``bitlock_t`` data structures. The RME GPT library will check that the array
259 Sample calculation for bitlocks array size
264 The size of bitlocks array in bits is the total protected space (PPS) divided
268 structure (8) to get the size of array in bytes.
270 In other words, we can find the total size of ``bitlock_t`` array
H A Dactivity-monitors.rst24 ``plat_amu_aux_enables`` platform hook. This is a per-core array indexed with
H A Dras.rst254 The platform is expected populate an array using the macros above, and register
256 passing it the name of the array describing the records. Note that the macro
257 must be used in the same file where the array is defined.
296 The platform is expected to define an array of ``struct ras_interrupt``, and
298 ``REGISTER_RAS_INTERRUPTS()``, passing it the name of the array. Note that the
299 macro must be used in the same file where the array is defined.
301 The array of ``struct ras_interrupt`` must be sorted in the increasing order of
347 sorted array of interrupts to look up the error record information associated
H A Dffa-manifest-binding.rst34 - value type: <prop-encoded-array>
35 - An array of comma separated tuples each consisting of 4 <u32> values,
278 - value type: <prop-encoded-array>
289 - value type: <prop-encoded-array>
337 - value type: <prop-encoded-array>
342 - value type: <prop-encoded-array>
374 - value type: <prop-encoded-array>
H A Dexception-handling.rst210 The platform expresses the chosen priority levels by declaring an array of
211 priority level descriptors. Each entry in the array is of type
217 The macro ``EHF_PRI_DESC()`` installs the descriptors in the array at a
218 computed index, and not necessarily where the macro is placed in the array.
219 The size of the array might therefore be larger than what it appears to be.
221 array.
223 Finally, this array of descriptors is exposed to |EHF| via the
606 priority scheme, the size of descriptor array exposed with
H A Drmm-el3-comms-spec.rst1137 | banks | 8 | memory_bank * | Pointer to 'memory_bank'[] array |
1143 and memory banks data array pointed by it.
1173 | consoles | 8 | console_info * | Pointer to 'console_info'[] array |
1179 pointer and the consoles array pointed by it.
1217 | smmus | 8 | smmu_info * | Pointer to 'smmu_info'[] array |
1254 | root_complex | 16 | root_complex_info * | Pointer to 'root_complex'[] array |
1281 | root_ports | 16 | root_port_info * | Pointer to 'root_port_info'[] array |
1303 | bdf_mappings | 8 | bdf_mapping_info * | Pointer to 'bdf_mapping_info'[] array |
1324 | smmu_idx | 6 | uint16_t | SMMU index in 'smmu_info'[] array |
H A Dsdei.rst97 - There must be exactly one descriptor in the private array, and none in the
98 shared array.
104 - Explicit events should only be used in the private array.
/rk3399_ARM-atf/plat/st/stm32mp1/
H A Dstm32mp1_scmi.c263 unsigned long *array, size_t *nb_elts, in plat_scmi_clock_rates_array() argument
280 if (array == NULL) { in plat_scmi_clock_rates_array()
283 *array = clk_get_rate(clock->clock_id); in plat_scmi_clock_rates_array()
/rk3399_ARM-atf/plat/amd/versal2/
H A Dscmi.c287 unsigned long *array, size_t *nb_elts, in plat_scmi_clock_rates_array() argument
303 if (array == NULL) { in plat_scmi_clock_rates_array()
306 *array = clock->rate; in plat_scmi_clock_rates_array()
308 scmi_id, clock->name, *array); in plat_scmi_clock_rates_array()
/rk3399_ARM-atf/docs/resources/diagrams/plantuml/
H A Dfconf_bl1_load_config.puml28 in global dtb_infos array.
/rk3399_ARM-atf/plat/allwinner/common/
H A Darisc_off.S12 # The encoded instructions go into an array defined in
/rk3399_ARM-atf/plat/imx/imx8ulp/
H A Dimx8ulp_psci.c73 .array = (a), \
/rk3399_ARM-atf/plat/imx/imx8ulp/upower/
H A Dupower_defs.h277 uint32_t array; /* RAM/ROM array state, 1 bit per instance */ member
/rk3399_ARM-atf/docs/components/fconf/
H A Dindex.rst84 anything appropriate: structure, array, function, etc..

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