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Searched refs:apupwr_writel (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/apusys/
H A Dapupwr_clkctl.c76 apupwr_writel(init_acc_cfg[i].val, in apupwr_smc_acc_init_all()
99 apupwr_writel(BIT(BIT_CGEN_APU), aacc_set[V_APU_CONN]); in apupwr_smc_acc_top()
100 apupwr_writel(BIT(BIT_CGEN_APU), aacc_set[V_TOP_IOMMU]); in apupwr_smc_acc_top()
102 apupwr_writel(BIT(BIT_CGEN_APU), aacc_clr[V_APU_CONN]); in apupwr_smc_acc_top()
103 apupwr_writel(BIT(BIT_CGEN_APU), aacc_clr[V_TOP_IOMMU]); in apupwr_smc_acc_top()
146 apupwr_writel(BIT(BIT_SEL_PARK), acc_set); in apupwr_smc_acc_set_parent()
147 apupwr_writel(BIT(BIT_SEL_F26M), acc_clr); in apupwr_smc_acc_set_parent()
149 apupwr_writel(BIT(BIT_CGEN_PARK), acc_set); in apupwr_smc_acc_set_parent()
150 apupwr_writel(BIT(BIT_CGEN_F26M) | BIT(BIT_CGEN_SOC), acc_clr); in apupwr_smc_acc_set_parent()
152 apupwr_writel(BIT(BIT_SEL_APU), acc_clr); in apupwr_smc_acc_set_parent()
[all …]
H A Dapupll.c538 apupwr_writel(pd, mixed_con1_addr[pll_idx]); in anpu_pll_set_rate()
544 apupwr_writel(dds, fhctl_dds_addr[pll_idx]); in anpu_pll_set_rate()
556 apupwr_writel(dds, fhctl_dvfs_addr[pll_idx]); in anpu_pll_set_rate()
558 apupwr_writel(dds, fhctl_dvfs_addr[pll_idx]); in anpu_pll_set_rate()
H A Dapupwr_clkctl_def.h71 #define apupwr_writel(VAL, REG) mmio_write_32((uintptr_t)REG, VAL) macro