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Searched refs:addr (Results 1 – 25 of 257) sorted by relevance

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/rk3399_ARM-atf/include/lib/
H A Dmmio.h12 static inline void mmio_write_8(uintptr_t addr, uint8_t value) in mmio_write_8() argument
14 *(volatile uint8_t*)addr = value; in mmio_write_8()
17 static inline uint8_t mmio_read_8(uintptr_t addr) in mmio_read_8() argument
19 return *(volatile uint8_t*)addr; in mmio_read_8()
22 static inline void mmio_write_16(uintptr_t addr, uint16_t value) in mmio_write_16() argument
24 *(volatile uint16_t*)addr = value; in mmio_write_16()
27 static inline uint16_t mmio_read_16(uintptr_t addr) in mmio_read_16() argument
29 return *(volatile uint16_t*)addr; in mmio_read_16()
32 static inline void mmio_clrsetbits_16(uintptr_t addr, in mmio_clrsetbits_16() argument
36 mmio_write_16(addr, (mmio_read_16(addr) & ~clear) | set); in mmio_clrsetbits_16()
[all …]
/rk3399_ARM-atf/plat/marvell/armada/common/mss/
H A Dmss_ipc_drv.c54 unsigned int addr; in mv_pm_ipc_queue_addr_get() local
61 addr = (unsigned int)(mv_pm_ipc_msg_base + in mv_pm_ipc_queue_addr_get()
66 return addr; in mv_pm_ipc_queue_addr_get()
77 unsigned int addr = mv_pm_ipc_queue_addr_get(); in mv_pm_ipc_msg_rx() local
79 msg->msg_reply = mmio_read_32(addr + IPC_MSG_REPLY_LOC); in mv_pm_ipc_msg_rx()
93 unsigned int addr = mv_pm_ipc_queue_addr_get(); in mv_pm_ipc_msg_tx() local
96 if (mmio_read_32(addr + IPC_MSG_STATE_LOC) == IPC_MSG_FREE) { in mv_pm_ipc_msg_tx()
101 mmio_write_32(addr + IPC_MSG_SYNC_ID_LOC, msg_sync); in mv_pm_ipc_msg_tx()
102 mmio_write_32(addr + IPC_MSG_ID_LOC, msg_id); in mv_pm_ipc_msg_tx()
103 mmio_write_32(addr + IPC_MSG_CPU_ID_LOC, channel_id); in mv_pm_ipc_msg_tx()
[all …]
/rk3399_ARM-atf/common/backtrace/
H A Dbacktrace.c65 uintptr_t addr = extract_address(address); in is_address_readable() local
68 ats1e3r(addr); in is_address_readable()
70 ats1e2r(addr); in is_address_readable()
72 AT(ats1e1r, addr); in is_address_readable()
84 static bool is_address_readable(uintptr_t addr) in is_address_readable() argument
89 write_ats1cpr(addr); in is_address_readable()
91 write_ats1hr(addr); in is_address_readable()
93 write_ats1cpr(addr); in is_address_readable()
110 static bool is_valid_object(uintptr_t addr, size_t size) in is_valid_object() argument
114 if (addr == 0U) in is_valid_object()
[all …]
/rk3399_ARM-atf/include/drivers/nxp/crypto/caam/
H A Dcaam_io.h28 #define sec_in64(addr) ( \ argument
29 ((uint64_t)sec_in32((uintptr_t)(addr)) << 32) | \
30 (sec_in32(((uintptr_t)(addr)) + 4)))
31 #define sec_out64(addr, val) ({ \ argument
32 sec_out32(((uintptr_t)(addr)), (uint32_t)((val) >> 32)); \
33 sec_out32(((uintptr_t)(addr)) + 4, (uint32_t)(val)); })
37 #define sec_in64(addr) ( \ argument
38 ((uint64_t)sec_in32((uintptr_t)(addr) + 4) << 32) | \
39 (sec_in32((uintptr_t)(addr))))
40 #define sec_out64(addr, val) ({ \ argument
[all …]
/rk3399_ARM-atf/include/drivers/arm/css/
H A Dcss_mhu_doorbell.h30 #define MHU_RING_DOORBELL(addr, modify_mask, preserve_mask) do { \ argument
31 uint32_t db = mmio_read_32(addr) & (preserve_mask); \
32 mmio_write_32(addr, db | (modify_mask)); \
35 #define MHU_V2_ACCESS_REQUEST(addr) \ argument
36 mmio_write_32((addr) + MHU_V2_ACCESS_REQ_OFFSET, 0x1)
38 #define MHU_V2_CLEAR_REQUEST(addr) \ argument
39 mmio_write_32((addr) + MHU_V2_ACCESS_REQ_OFFSET, 0x0)
41 #define MHU_V2_IS_ACCESS_READY(addr) \ argument
42 (mmio_read_32((addr) + MHU_V2_ACCESS_READY_OFFSET) & 0x1)
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/m0/include/
H A Drk3399_mcu.h18 #define mmio_clrbits_32(addr, clear) \ argument
19 mmio_write_32(addr, (mmio_read_32(addr) & ~(clear)))
20 #define mmio_setbits_32(addr, set) \ argument
21 mmio_write_32(addr, (mmio_read_32(addr)) | (set))
22 #define mmio_clrsetbits_32(addr, clear, set) \ argument
23 mmio_write_32(addr, (mmio_read_32(addr) & ~(clear)) | (set))
/rk3399_ARM-atf/plat/brcm/board/stingray/driver/
H A Dswreg.c158 static int write_swreg_config(enum sw_reg reg_id, uint32_t addr, uint32_t data) in write_swreg_config() argument
163 cmd = BSTI_CMD(0x1, BSTI_WRITE, reg_id, addr, BSTI_COMMAND_TA, data); in write_swreg_config()
169 sw_reg_name[reg_id-1], addr); in write_swreg_config()
175 static int read_swreg_config(enum sw_reg reg_id, uint32_t addr, uint32_t *data) in read_swreg_config() argument
180 cmd = BSTI_CMD(0x1, BSTI_READ, reg_id, addr, BSTI_COMMAND_TA, PHY_REG0); in read_swreg_config()
186 sw_reg_name[reg_id-1], addr); in read_swreg_config()
227 int addr; in dump_swreg_firmware() local
232 for (addr = MIN_REG_ADDR; addr <= MAX_REG_ADDR; addr++) { in dump_swreg_firmware()
233 ret = read_swreg_config(reg_id, addr, &data); in dump_swreg_firmware()
235 ERROR("Failed to read offset %d\n", addr); in dump_swreg_firmware()
[all …]
/rk3399_ARM-atf/drivers/marvell/secure_dfx_access/
H A Dmisc_dfx.c57 static _Bool is_valid(u_register_t addr) in is_valid() argument
59 switch (addr) { in is_valid()
83 static int armada_dfx_sread(u_register_t *read, u_register_t addr) in armada_dfx_sread() argument
85 if (!is_valid(addr)) in armada_dfx_sread()
88 *read = mmio_read_32(addr); in armada_dfx_sread()
93 static int armada_dfx_swrite(u_register_t addr, u_register_t val) in armada_dfx_swrite() argument
95 if (!is_valid(addr)) in armada_dfx_swrite()
98 mmio_write_32(addr, val); in armada_dfx_swrite()
104 u_register_t addr, u_register_t val) in mvebu_dfx_misc_handle() argument
108 debug("func %ld, addr 0x%lx, val 0x%lx\n", func, addr, val); in mvebu_dfx_misc_handle()
[all …]
/rk3399_ARM-atf/plat/nxp/common/setup/
H A Dls_common.c67 (void *) info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
68 (void *) (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
71 mmap_add_region(info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
72 info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
80 (void *) (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
82 (void *) (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
87 mmap_add_region((info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
89 (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
100 (void *) info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
101 (void *) (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
[all …]
/rk3399_ARM-atf/plat/qti/common/src/
H A Dspmi_arb.c35 static int addr_to_apid(uint32_t addr) in addr_to_apid() argument
41 if ((reg != 0U) && ((addr & PPID_MASK) == (reg & PPID_MASK))) { in addr_to_apid()
69 static void arb_command(uint16_t apid, uint8_t opcode, uint32_t addr, in arb_command() argument
73 (addr & 0xff) << 4 | (bytes - 1)); in arb_command()
76 int spmi_arb_read8(uint32_t addr) in spmi_arb_read8() argument
78 int apid = addr_to_apid(addr); in spmi_arb_read8()
84 arb_command(apid, OPC_EXT_READL, addr, 1); in spmi_arb_read8()
88 ERROR("SPMI_ARB read error [0x%x]: 0x%x\n", addr, ret); in spmi_arb_read8()
95 int spmi_arb_write8(uint32_t addr, uint8_t data) in spmi_arb_write8() argument
97 int apid = addr_to_apid(addr); in spmi_arb_write8()
[all …]
/rk3399_ARM-atf/drivers/renesas/rcar/cpld/
H A Dulcb_cpld.c34 static void gpio_set_value(uint32_t addr, uint8_t gpio, uint32_t val) in gpio_set_value() argument
38 reg = mmio_read_32(addr); in gpio_set_value()
43 mmio_write_32(addr, reg); in gpio_set_value()
46 static void gpio_direction_output(uint32_t addr, uint8_t gpio) in gpio_direction_output() argument
50 reg = mmio_read_32(addr); in gpio_direction_output()
52 mmio_write_32(addr, reg); in gpio_direction_output()
55 static void gpio_pfc(uint32_t addr, uint8_t gpio) in gpio_pfc() argument
59 reg = mmio_read_32(addr); in gpio_pfc()
62 mmio_write_32(addr, reg); in gpio_pfc()
65 static void cpld_write(uint8_t addr, uint32_t data) in cpld_write() argument
[all …]
/rk3399_ARM-atf/plat/rockchip/rk3568/drivers/otp/
H A Dotp.c162 static uint32_t otp_select(uint32_t addr) in otp_select() argument
166 if (addr < 0x1c0) { /* 0-447 otp0 S */ in otp_select()
171 } else if (addr >= 0x1c0 && addr < 0x200) { /* 448-511 otp0 NS */ in otp_select()
209 static int rk_otp_sbpi_read(uint32_t addr, uint16_t *read_data, bool is_need_ecc) in rk_otp_sbpi_read() argument
214 otp_base = otp_select(addr); in rk_otp_sbpi_read()
246 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(1), addr & 0xff); /* sbpi cmd 3c addr */ in rk_otp_sbpi_read()
248 (addr >> 8) & 0xff); /* sbpi cmd 3d addr */ in rk_otp_sbpi_read()
279 VERBOSE("otp_addr:0x%x, otp_qp:0x%x\n", addr, otp_qp); in rk_otp_sbpi_read()
281 otp_ns_ecc_flag[addr - OTP_S_BYTE_SIZE / 2] = 1; in rk_otp_sbpi_read()
282 ERROR("ecc otp_addr:0x%x, otp_qp failed 0x%x\n", addr, otp_qp); in rk_otp_sbpi_read()
[all …]
/rk3399_ARM-atf/include/drivers/brcm/
H A Dchimp.h45 void bcm_chimp_write(uintptr_t addr, uint32_t value);
46 uint32_t bcm_chimp_read(uintptr_t addr);
48 void bcm_chimp_clrbits(uintptr_t addr, uint32_t bits);
49 void bcm_chimp_setbits(uintptr_t addr, uint32_t bits);
57 static inline void bcm_chimp_write(uintptr_t addr, uint32_t value) in bcm_chimp_write() argument
60 static inline uint32_t bcm_chimp_read(uintptr_t addr) in bcm_chimp_read() argument
68 static inline void bcm_chimp_clrbits(uintptr_t addr, uint32_t bits) in bcm_chimp_clrbits() argument
71 static inline void bcm_chimp_setbits(uintptr_t addr, uint32_t bits) in bcm_chimp_setbits() argument
/rk3399_ARM-atf/plat/arm/common/
H A Dplat_rmm_mem_carveout.c16 uintptr_t addr; in plat_rmmd_reserve_memory() local
19 addr = (top_mem - size) & ~align_mask; in plat_rmmd_reserve_memory()
20 if (addr >= RMM_PAYLOAD_LIMIT) { in plat_rmmd_reserve_memory()
21 top_mem = addr; in plat_rmmd_reserve_memory()
23 addr = 0; in plat_rmmd_reserve_memory()
27 return addr; in plat_rmmd_reserve_memory()
/rk3399_ARM-atf/drivers/brcm/
H A Dchimp.c19 #define CHIMP_PREPARE_ACCESS_WINDOW(addr) \ argument
23 addr & 0xffc00000)\
25 #define CHIMP_INDIRECT_TGT_ADDR(addr) \ argument
26 (CHIMP_INDIRECT_BASE + (addr & CHIMP_INDIRECT_ADDR_MASK))
37 void bcm_chimp_write(uintptr_t addr, uint32_t value) in bcm_chimp_write() argument
39 CHIMP_PREPARE_ACCESS_WINDOW(addr); in bcm_chimp_write()
40 mmio_write_32(CHIMP_INDIRECT_TGT_ADDR(addr), value); in bcm_chimp_write()
43 uint32_t bcm_chimp_read(uintptr_t addr) in bcm_chimp_read() argument
45 CHIMP_PREPARE_ACCESS_WINDOW(addr); in bcm_chimp_read()
46 return mmio_read_32(CHIMP_INDIRECT_TGT_ADDR(addr)); in bcm_chimp_read()
[all …]
/rk3399_ARM-atf/drivers/marvell/comphy/
H A Dphy-comphy-common.h124 static inline uint32_t polling_with_timeout(uintptr_t addr, uint32_t val, in polling_with_timeout() argument
134 data = mmio_read_16(addr) & mask; in polling_with_timeout()
136 data = mmio_read_32(addr) & mask; in polling_with_timeout()
145 static inline void reg_set(uintptr_t addr, uint32_t data, uint32_t mask) in reg_set() argument
148 addr, data, mask); in reg_set()
149 debug("old value = 0x%x ==> ", mmio_read_32(addr)); in reg_set()
150 mmio_clrsetbits_32(addr, mask, data & mask); in reg_set()
152 debug("new val 0x%x\n", mmio_read_32(addr)); in reg_set()
155 static inline void __unused reg_set16(uintptr_t addr, uint16_t data, in reg_set16() argument
160 addr, data, mask); in reg_set16()
[all …]
/rk3399_ARM-atf/plat/arm/board/corstone700/common/drivers/mhu/
H A Dcorstone700_mhu.h21 #define MHU_V2_ACCESS_REQUEST(addr) \ argument
22 mmio_write_32((addr) + MHU_V2_ACCESS_REQ_OFFSET, 0x1)
24 #define MHU_V2_CLEAR_REQUEST(addr) \ argument
25 mmio_write_32((addr) + MHU_V2_ACCESS_REQ_OFFSET, 0x0)
27 #define MHU_V2_IS_ACCESS_READY(addr) \ argument
28 (mmio_read_32((addr) + MHU_V2_ACCESS_READY_OFFSET) & 0x1)
/rk3399_ARM-atf/plat/mediatek/include/drivers/
H A Dspmi_api.h16 int spmi_register_read(struct spmi_device *dev, uint8_t addr, uint8_t *buf);
17 int spmi_register_write(struct spmi_device *dev, uint8_t addr, uint8_t data);
18 int spmi_ext_register_read(struct spmi_device *dev, uint8_t addr, uint8_t *buf,
20 int spmi_ext_register_write(struct spmi_device *dev, uint8_t addr,
22 int spmi_ext_register_readl(struct spmi_device *dev, uint16_t addr,
24 int spmi_ext_register_writel(struct spmi_device *dev, uint16_t addr,
26 int spmi_ext_register_readl_field(struct spmi_device *dev, uint16_t addr,
28 int spmi_ext_register_writel_field(struct spmi_device *dev, uint16_t addr,
/rk3399_ARM-atf/plat/mediatek/drivers/spmi/
H A Dspmi_common.c33 int spmi_register_read(struct spmi_device *dev, uint8_t addr, uint8_t *buf) in spmi_register_read() argument
36 if (addr > SPMI_READ_ADDR_MAX) in spmi_register_read()
39 return dev->pmif_arb->read_cmd(dev->pmif_arb, SPMI_CMD_READ, dev->slvid, addr, buf, 1); in spmi_register_read()
42 int spmi_register_write(struct spmi_device *dev, uint8_t addr, uint8_t data) in spmi_register_write() argument
45 if (addr > SPMI_READ_ADDR_MAX) in spmi_register_write()
49 dev->slvid, addr, &data, 1); in spmi_register_write()
52 int spmi_ext_register_read(struct spmi_device *dev, uint8_t addr, uint8_t *buf, in spmi_ext_register_read() argument
60 dev->slvid, addr, buf, len); in spmi_ext_register_read()
63 int spmi_ext_register_write(struct spmi_device *dev, uint8_t addr, in spmi_ext_register_write() argument
71 dev->slvid, addr, buf, len); in spmi_ext_register_write()
[all …]
/rk3399_ARM-atf/plat/intel/soc/common/
H A Dsocfpga_dt.c65 uintptr_t addr; in socfpga_dt_populate_gicv3_config() local
83 err = fdt_get_reg_props_by_index(hw_config_dtb, node, 0, &addr, NULL); in socfpga_dt_populate_gicv3_config()
87 plat_driver_data->gicd_base = addr; in socfpga_dt_populate_gicv3_config()
90 err = fdt_get_reg_props_by_index(hw_config_dtb, node, 1, &addr, NULL); in socfpga_dt_populate_gicv3_config()
94 plat_driver_data->gicr_base = addr; in socfpga_dt_populate_gicv3_config()
102 uintptr_t addr; in socfpga_dt_populate_dram_layout() local
118 &addr, (size_t *)&size); in socfpga_dt_populate_dram_layout()
120 NOTICE("SOCFPGA: Mem base 0x%lx, Mem size 0x%lx\n", addr, size); in socfpga_dt_populate_dram_layout()
/rk3399_ARM-atf/drivers/marvell/
H A Dcache_llc.c160 uintptr_t addr, end_addr; in llc_sram_test() local
167 for (addr = PLAT_MARVELL_TRUSTED_RAM_BASE, in llc_sram_test()
169 addr < end_addr; addr += 4) { in llc_sram_test()
170 mmio_write_32(addr, addr); in llc_sram_test()
174 for (addr = PLAT_MARVELL_TRUSTED_RAM_BASE, in llc_sram_test()
176 addr < end_addr; addr += 4) { in llc_sram_test()
177 data = mmio_read_32(addr); in llc_sram_test()
178 if (data != addr) { in llc_sram_test()
180 msg, addr); in llc_sram_test()
/rk3399_ARM-atf/plat/mediatek/drivers/ptp3/
H A Dptp3_common.c17 unsigned int i, addr, value; in ptp3_init() local
29 addr = ptp3_cfg2[i][PTP3_CFG_ADDR] + PTP3_CORE_OFT(core); in ptp3_init()
32 mmio_write_32(addr, value); in ptp3_init()
36 addr = ptp3_cfg2[i][PTP3_CFG_ADDR] + PTP3_CORE_OFT(core); in ptp3_init()
43 mmio_write_32(addr, value); in ptp3_init()
48 addr = ptp3_cfg3[PTP3_CFG_ADDR] + PTP3_CORE_OFT(core); in ptp3_init()
51 addr = ptp3_cfg3_ext[PTP3_CFG_ADDR] + PTP3_CORE_OFT(core); in ptp3_init()
54 mmio_write_32(addr, value & PTP3_CFG3_MASK1); in ptp3_init()
55 mmio_write_32(addr, value & PTP3_CFG3_MASK2); in ptp3_init()
56 mmio_write_32(addr, value & PTP3_CFG3_MASK3); in ptp3_init()
/rk3399_ARM-atf/plat/imx/common/
H A Dimx_clock.c19 uintptr_t addr; in imx_clock_target_set() local
24 addr = (uintptr_t)&ccm->ccm_root_ctrl[id].ccm_target_root; in imx_clock_target_set()
25 mmio_write_32(addr, val); in imx_clock_target_set()
31 uintptr_t addr; in imx_clock_target_clr() local
36 addr = (uintptr_t)&ccm->ccm_root_ctrl[id].ccm_target_root_clr; in imx_clock_target_clr()
37 mmio_write_32(addr, val); in imx_clock_target_clr()
43 uintptr_t addr; in imx_clock_gate_enable() local
50 addr = (uintptr_t)&ccm->ccm_clk_gate_ctrl[id].ccm_ccgr_set; in imx_clock_gate_enable()
52 addr = (uintptr_t)&ccm->ccm_clk_gate_ctrl[id].ccm_ccgr_clr; in imx_clock_gate_enable()
54 mmio_write_32(addr, CCM_CCGR_SETTING0_DOM_CLK_ALWAYS); in imx_clock_gate_enable()
/rk3399_ARM-atf/plat/rockchip/common/
H A Dplat_pm_helpers.c91 uint32_t addr; in rockchip_reg_rgn_save() local
98 for (j = 0, addr = r->start; addr <= r->end; addr += r->stride, j++) in rockchip_reg_rgn_save()
99 r->buf[j] = mmio_read_32(addr); in rockchip_reg_rgn_save()
111 uint32_t addr; in rockchip_reg_rgn_restore() local
118 for (j = 0, addr = r->start; addr <= r->end; addr += r->stride, j++) in rockchip_reg_rgn_restore()
119 mmio_write_32(addr, r->buf[j] | r->wmsk); in rockchip_reg_rgn_restore()
133 uint32_t addr; in rockchip_reg_rgn_restore_reverse() local
141 for (addr = r->end; addr >= r->start; addr -= r->stride, j--) in rockchip_reg_rgn_restore_reverse()
142 mmio_write_32(addr, r->buf[j] | r->wmsk); in rockchip_reg_rgn_restore_reverse()
/rk3399_ARM-atf/lib/per_cpu/
H A Dper_cpu.c10 __pure void *per_cpu_by_index_compute(uint32_t cpu, const void *addr) in per_cpu_by_index_compute() argument
20 return (void *)(cpu_base + PER_CPU_OFFSET(addr)); in per_cpu_by_index_compute()
23 __pure void *per_cpu_cur_compute(const void *addr) in per_cpu_cur_compute() argument
26 return (per_cpu_by_index_compute(plat_my_core_pos(), addr)); in per_cpu_cur_compute()
28 return (void *)((read_tpidr_el3() + PER_CPU_OFFSET(addr))); in per_cpu_cur_compute()

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