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Searched refs:_width (Results 1 – 6 of 6) sorted by relevance

/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32-core.h141 #define MASK_WIDTH_SHIFT(_width, _shift) \ argument
142 GENMASK(((_width) + (_shift) - 1U), (_shift))
332 #define DRIVE(_offset, _shift, _width, _default) &(struct stm32_clk_drive){\ argument
335 .drv_width = (_width),\
H A Dstm32mp1_clk.c123 #define DIV_CFG(_id, _offset, _shift, _width, _bitrdy)\ argument
127 .width = (_width),\
153 #define MUXRDY_CFG(_id, _offset, _shift, _width, _bitrdy)\ argument
157 .width = (_width),\
161 #define MUX_CFG(_id, _offset, _shift, _width)\ argument
162 MUXRDY_CFG(_id, _offset, _shift, _width, MUX_NO_BIT_RDY)
211 #define MASK_WIDTH_SHIFT(_width, _shift) \ argument
212 GENMASK(((_width) + (_shift) - 1U), (_shift))
H A Dclk-stm32-core.c236 #define clk_div_mask(_width) GENMASK(((_width) - 1U), 0U) argument
H A Dclk-stm32mp13.c777 #define DIV_CFG(id, _offset, _shift, _width, _flags, _table, _bitrdy)[id] = {\ argument
780 .width = _width,\
H A Dclk-stm32mp2.c614 #define DIV_CFG(id, _offset, _shift, _width, _flags, _table, _bitrdy)[id] = {\ argument
617 .width = _width,\
/rk3399_ARM-atf/include/lib/cpus/aarch64/
H A Dcpu_macros.S396 .macro sysreg_bitfield_insert _reg:req, _src:req, _lsb:req, _width:req
400 bfi x0, x1, #\_lsb, #\_width
404 .macro sysreg_bitfield_insert_from_gpr _reg:req, _gpr:req, _lsb:req, _width:req
408 bfi x0, x1, #\_lsb, #\_width