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Searched refs:__BL31_END__ (Results 1 – 10 of 10) sorted by relevance

/rk3399_ARM-atf/plat/renesas/common/include/
H A Dplat.ld.S31 ASSERT(__BL31_END__ <= BL31_LIMIT - DEVICE_SRAM_SIZE,
/rk3399_ARM-atf/bl31/
H A Dbl31.ld.S190 __BL31_END__ = .; define
249 __BL31_END__ = .; define
/rk3399_ARM-atf/plat/renesas/rcar_gen5/include/
H A Dplat.ld.S43 ASSERT(__BL31_END__ <= (BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE)),
/rk3399_ARM-atf/plat/renesas/rcar_gen4/include/
H A Dplat.ld.S43 ASSERT(__BL31_END__ <= (BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE)),
/rk3399_ARM-atf/include/common/
H A Dbl_common.h57 #define __BL31_END__ Load$$LR$$LR_END$$Base macro
134 IMPORT_SYM(uintptr_t, __BL31_END__, BL31_END);
/rk3399_ARM-atf/plat/nxp/common/setup/include/
H A Dplat_common.h20 #define BL31_END (uintptr_t)(&__BL31_END__)
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/
H A Dplat_trampoline.S88 .quad __BL31_END__ - BL31_BASE
H A Dplat_psci_handlers.c270 uint64_t src_len_in_bytes = (uintptr_t)&__BL31_END__ - (uintptr_t)BL31_BASE; in tegra_soc_pwr_domain_power_down_wfi()
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/
H A Dplat_psci_handlers.c287 uint64_t src_len_in_bytes = (uint64_t)(((uintptr_t)(&__BL31_END__) - in tegra_soc_pwr_domain_power_down_wfi()
/rk3399_ARM-atf/docs/design/
H A Dfirmware-design.rst1790 - ``bl31.map`` link map file provides ``__BL31_END__`` address.