xref: /rk3399_ARM-atf/plat/renesas/rcar_gen4/include/plat.ld.S (revision a9e9e26cb654f2f5c3473770ae7390f2c4eacf73)
1*b45b5bacSMarek Vasut/*
2*b45b5bacSMarek Vasut * Copyright (c) 2018-2025, ARM Limited and Contributors. All rights reserved.
3*b45b5bacSMarek Vasut * Copyright (c) 2022-2025, Renesas Electronics Corporation. All rights reserved.
4*b45b5bacSMarek Vasut *
5*b45b5bacSMarek Vasut * SPDX-License-Identifier: BSD-3-Clause
6*b45b5bacSMarek Vasut */
7*b45b5bacSMarek Vasut#ifndef RCAR_PLAT_LD_S
8*b45b5bacSMarek Vasut#define RCAR_PLAT_LD_S
9*b45b5bacSMarek Vasut
10*b45b5bacSMarek Vasut#include <lib/xlat_tables/xlat_tables_defs.h>
11*b45b5bacSMarek Vasut#include <platform_def.h>
12*b45b5bacSMarek Vasut
13*b45b5bacSMarek VasutMEMORY {
14*b45b5bacSMarek Vasut    SRAM      (rwx): ORIGIN = DEVICE_SRAM_BASE, LENGTH = DEVICE_SRAM_SIZE
15*b45b5bacSMarek Vasut    SRAM_DATA (rwx): ORIGIN = DEVICE_SRAM_DATA_BASE, LENGTH = DEVICE_SRAM_DATA_SIZE
16*b45b5bacSMarek Vasut    PRAM      (r)  : ORIGIN = BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE),
17*b45b5bacSMarek Vasut                     LENGTH = DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE
18*b45b5bacSMarek Vasut}
19*b45b5bacSMarek Vasut
20*b45b5bacSMarek VasutSECTIONS
21*b45b5bacSMarek Vasut{
22*b45b5bacSMarek Vasut	/* SRAM_COPY is in PRAM (RO) */
23*b45b5bacSMarek Vasut	. = BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE);
24*b45b5bacSMarek Vasut	__SRAM_COPY_START__ = .;
25*b45b5bacSMarek Vasut
26*b45b5bacSMarek Vasut	.system_ram : {
27*b45b5bacSMarek Vasut		/* system ram start is in SRAM */
28*b45b5bacSMarek Vasut		__system_ram_start__ = .;
29*b45b5bacSMarek Vasut		*(.system_ram)
30*b45b5bacSMarek Vasut		*spinlock.o(.text.*)
31*b45b5bacSMarek Vasut	        __system_ram_end__ = .;
32*b45b5bacSMarek Vasut	} >SRAM AT>PRAM
33*b45b5bacSMarek Vasut
34*b45b5bacSMarek Vasut	/* SRAM variable is in PRAM (RW) */
35*b45b5bacSMarek Vasut	. = BL31_LIMIT - DEVICE_SRAM_DATA_SIZE;
36*b45b5bacSMarek Vasut
37*b45b5bacSMarek Vasut	.system_ram_data : {
38*b45b5bacSMarek Vasut		__system_ram_data_start__ = .;
39*b45b5bacSMarek Vasut		*(.system_ram_data)
40*b45b5bacSMarek Vasut	        __system_ram_data_end__ = .;
41*b45b5bacSMarek Vasut	} >SRAM_DATA AT>PRAM
42*b45b5bacSMarek Vasut
43*b45b5bacSMarek Vasut    ASSERT(__BL31_END__ <= (BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE)),
44*b45b5bacSMarek Vasut    "BL31 image too large - writing on top of SRAM!")
45*b45b5bacSMarek Vasut
46*b45b5bacSMarek Vasut}
47*b45b5bacSMarek Vasut
48*b45b5bacSMarek Vasut#endif /* RCAR_PLAT_LD_S */
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