Searched refs:TXDCLK_2X_SEL (Results 1 – 3 of 3) sorted by relevance
128 #define TXDCLK_2X_SEL BIT(6) macro
848 MISC_CTRL0_DEFAULT_VALUE | CLK500M_EN | TXDCLK_2X_SEL | CLK100M_125M_EN, in mvebu_a3700_comphy_pcie_power_on()
9861 - Set TXDCLK_2X_SEL bit during PCIe initialization