Searched refs:TMASTER (Results 1 – 8 of 8) sorted by relevance
| /rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/src/ |
| H A D | ddrphy_phyinit_i_loadpieimage.c | 36 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | C0 | in dfiwrrddatacsconfig_program() 88 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (C0 | TMASTER | CSR_SEQ0BDLY0_ADDR))), in seq0bdly_program() 91 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (C0 | TMASTER | CSR_SEQ0BDLY1_ADDR))), in seq0bdly_program() 94 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (C0 | TMASTER | CSR_SEQ0BDLY2_ADDR))), in seq0bdly_program() 97 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (C0 | TMASTER | CSR_SEQ0BDLY3_ADDR))), in seq0bdly_program() 174 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_PPTTRAINSETUP_ADDR))), in ppttrainsetup_program() 176 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | in ppttrainsetup_program() 326 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_CALRATE_ADDR))), calrate); in calrate_program() 378 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_CALZAP_ADDR))), 0x1U); in ddrphy_phyinit_i_loadpieimage()
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| H A D | ddrphy_phyinit_c_initphyconfig.c | 130 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | in dfidatacsdestmap_program() 133 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | in dfidatacsdestmap_program() 165 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_PLLCTRL2_ADDR))), pllctrl2); in pllctrl2_program() 200 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_ARDPTRINITVAL_ADDR))), in ardptrinitval_program() 294 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_DQSPREAMBLECONTROL_ADDR))), in dbytedllmodecntrl_program() 298 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_DBYTEDLLMODECNTRL_ADDR))), in dbytedllmodecntrl_program() 305 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_DLLLOCKPARAM_ADDR))), in dbytedllmodecntrl_program() 308 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_DLLGAINCTL_ADDR))), in dbytedllmodecntrl_program() 351 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_PROCODTTIMECTL_ADDR))), in procodttimectl_program() 512 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_DFIMODE_ADDR))), dfimode); in dfimode_program() [all …]
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| H A D | ddrphy_phyinit_progcsrskiptrain.c | 82 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_HWTMRL_ADDR))), dfimrl); in dfimrl_program() 530 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_HWTLPCSENA_ADDR))), 539 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_HWTLPCSENB_ADDR))), 543 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_HWTLPCSENB_ADDR))), 548 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_HWTLPCSENB_ADDR))), 706 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_HWTCAMODE_ADDR))), hwtcamode); 765 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_DLLGAINCTL_ADDR))), 771 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_DLLLOCKPARAM_ADDR))), 808 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_PLLCTRL3_ADDR))),
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| H A D | ddrphy_phyinit_d_loadimem.c | 39 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_MEMRESETL_ADDR))), memresetl); in ddrphy_phyinit_d_loadimem()
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| H A D | ddrphy_phyinit_restore_sequence.c | 58 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_CALZAP_ADDR))), 0x1U); in ddrphy_phyinit_restore_sequence()
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| /rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/usercustom/ |
| H A D | ddrphy_phyinit_usercustom_saveretregs.c | 64 ret = ddrphy_phyinit_trackreg(TMASTER | CSR_PLLCTRL3_ADDR); in ddrphy_phyinit_usercustom_saveretregs() 148 ret = ddrphy_phyinit_trackreg(TMASTER | CSR_VREFINGLOBAL_ADDR); in ddrphy_phyinit_usercustom_saveretregs() 294 ret = ddrphy_phyinit_trackreg(TMASTER | CSR_DLLGAINCTL_ADDR); in ddrphy_phyinit_usercustom_saveretregs() 299 ret = ddrphy_phyinit_trackreg(TMASTER | CSR_DLLLOCKPARAM_ADDR); in ddrphy_phyinit_usercustom_saveretregs() 304 ret = ddrphy_phyinit_trackreg(TMASTER | CSR_HWTMRL_ADDR); in ddrphy_phyinit_usercustom_saveretregs() 316 ret = ddrphy_phyinit_trackreg(TMASTER | CSR_HWTCAMODE_ADDR); in ddrphy_phyinit_usercustom_saveretregs() 322 ret = ddrphy_phyinit_trackreg(TMASTER | CSR_HWTLPCSENA_ADDR); in ddrphy_phyinit_usercustom_saveretregs() 327 ret = ddrphy_phyinit_trackreg(TMASTER | CSR_HWTLPCSENB_ADDR); in ddrphy_phyinit_usercustom_saveretregs()
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| H A D | ddrphy_phyinit_usercustom_custompretrain.c | 53 base = (uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_HWTSWIZZLEHWTADDRESS0_ADDR))); in ddrphy_phyinit_usercustom_custompretrain() 76 base = (uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_MAPCAA0TODFI_ADDR))); in ddrphy_phyinit_usercustom_custompretrain() 83 base = (uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_MAPCAB0TODFI_ADDR))); in ddrphy_phyinit_usercustom_custompretrain()
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| /rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/include/ |
| H A D | ddrphy_csr_all_cdefines.h | 6934 #define TMASTER 0x20000U macro
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