xref: /rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_d_loadimem.c (revision eaaf26e3e6ac347cbfda00b6ba7d327e715d68f0)
1 /*
2  * Copyright (C) 2021-2024, STMicroelectronics - All Rights Reserved
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <stdio.h>
8 #include <stdlib.h>
9 
10 #include <common/debug.h>
11 
12 #include <ddrphy_phyinit.h>
13 
14 #include <lib/mmio.h>
15 
16 #include <platform_def.h>
17 
18 /*
19  * This function loads the training firmware IMEM image into the PHY.
20  *
21  * This function reads the DDR firmware source memory area to generate a
22  * set of apb writes to load IMEM image into the PHY. The exact steps in this
23  * function are as follows:
24  *
25  * -# Ensure DRAM is in reset.
26  * -# Load the microcontroller memory with the provided training firmware
27  * -# Initialize the firmware mailbox structures to be able to communicate with
28  * the firmware.
29  *
30  * \return void
31  */
ddrphy_phyinit_d_loadimem(void)32 void ddrphy_phyinit_d_loadimem(void)
33 {
34 	uint16_t memresetl;
35 	uint32_t *ptr32;
36 
37 	/* Set memresetl to avoid glitch on BP_MemReset_L during training */
38 	memresetl = CSR_PROTECTMEMRESET_MASK;
39 	mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_MEMRESETL_ADDR))), memresetl);
40 
41 	ptr32 = (uint32_t *)(STM32MP_DDR_FW_BASE + STM32MP_DDR_FW_IMEM_OFFSET);
42 	ddrphy_phyinit_writeoutmem(ptr32, IMEM_ST_ADDR, IMEM_SIZE);
43 }
44