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Searched refs:SEC_SRAM_BASE (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/plat/rpi/rpi3/
H A Drpi3_bl31_setup.c229 rc = fdt_add_mem_rsv(dtb, SEC_SRAM_BASE, SEC_SRAM_SIZE); in rpi3_dtb_add_mem_rsv()
234 INFO("rpi3: Reserved 0x%llx - 0x%llx in DTB\n", SEC_SRAM_BASE, in rpi3_dtb_add_mem_rsv()
235 SEC_SRAM_BASE + SEC_SRAM_SIZE); in rpi3_dtb_add_mem_rsv()
/rk3399_ARM-atf/plat/rpi/rpi3/include/
H A Dplatform_def.h75 #define SEC_SRAM_BASE ULL(0x00200000) macro
93 #define SEC_SRAM_BASE ULL(0x10000000) macro
122 #define SHARED_RAM_BASE SEC_SRAM_BASE
/rk3399_ARM-atf/plat/qemu/qemu/include/
H A Dplatform_def.h86 #define SEC_SRAM_BASE 0x0e000000 macro
105 #define SHARED_RAM_BASE SEC_SRAM_BASE
/rk3399_ARM-atf/plat/qemu/qemu_sbsa/include/
H A Dplatform_def.h87 #define SEC_SRAM_BASE 0x20000000 macro
104 #define SHARED_RAM_BASE SEC_SRAM_BASE
/rk3399_ARM-atf/docs/
H A Dchange-log.md9993 - Explicitly map SEC_SRAM_BASE to 0x0