| /rk3399_ARM-atf/services/spd/tspd/ |
| H A D | tspd_main.c | 64 assert(handle == cm_get_context(SECURE)); in tspd_handle_sp_preemption() 65 cm_el1_sysregs_context_save(SECURE); in tspd_handle_sp_preemption() 161 assert(handle == cm_get_context(SECURE)); in tspd_sel1_interrupt_handler() 166 cm_el1_sysregs_context_save(SECURE); in tspd_sel1_interrupt_handler() 180 assert(&tsp_ctx->cpu_ctx == cm_get_context(SECURE)); in tspd_sel1_interrupt_handler() 202 cm_el1_sysregs_context_restore(SECURE); in tspd_sel1_interrupt_handler() 203 cm_set_elr_spsr_el3(SECURE, (uint64_t) &tsp_vectors->sel1_intr_entry, in tspd_sel1_interrupt_handler() 206 cm_set_next_eret_context(SECURE); in tspd_sel1_interrupt_handler() 230 assert(get_interrupt_src_ss(flags) == SECURE); in tspd_ns_interrupt_handler() 236 disable_intr_rm_local(INTR_TYPE_NS, SECURE); in tspd_ns_interrupt_handler() [all …]
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| H A D | tspd_common.c | 48 cm_set_context(&tsp_ctx->cpu_ctx, SECURE); in tspd_init_tsp_ep_state() 51 ep_attr = SECURE | EP_ST_ENABLE; in tspd_init_tsp_ep_state() 79 assert(cm_get_context(SECURE) == &tsp_ctx->cpu_ctx); in tspd_synchronous_sp_entry() 80 cm_el1_sysregs_context_restore(SECURE); in tspd_synchronous_sp_entry() 81 cm_set_next_eret_context(SECURE); in tspd_synchronous_sp_entry() 104 assert(cm_get_context(SECURE) == &tsp_ctx->cpu_ctx); in tspd_synchronous_sp_exit() 105 cm_el1_sysregs_context_save(SECURE); in tspd_synchronous_sp_exit() 131 cm_set_elr_el3(SECURE, in tspd_abort_preempted_smc()
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| H A D | tspd_pm.c | 46 cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_off_entry); in tspd_cpu_off_handler() 85 cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_suspend_entry); in tspd_cpu_suspend_handler() 132 disable_intr_rm_local(INTR_TYPE_NS, SECURE); in tspd_cpu_on_finish_handler() 167 cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_resume_entry); in tspd_cpu_suspend_finish_handler() 214 cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->system_off_entry); in tspd_system_off() 240 cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->system_reset_entry); in tspd_system_reset()
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| /rk3399_ARM-atf/services/spd/pncd/ |
| H A D | pncd_common.c | 38 cm_set_context(&pnc_ctx->cpu_ctx, SECURE); in pncd_init_pnc_ep_state() 41 ep_attr = SECURE | EP_ST_ENABLE; in pncd_init_pnc_ep_state() 68 assert(cm_get_context(SECURE) == &pnc_ctx->cpu_ctx); in pncd_synchronous_sp_entry() 69 cm_el1_sysregs_context_restore(SECURE); in pncd_synchronous_sp_entry() 72 simd_ctx_restore(SECURE); in pncd_synchronous_sp_entry() 74 cm_set_next_eret_context(SECURE); in pncd_synchronous_sp_entry() 92 assert(cm_get_context(SECURE) == &pnc_ctx->cpu_ctx); in pncd_synchronous_sp_exit() 93 cm_el1_sysregs_context_save(SECURE); in pncd_synchronous_sp_exit() 96 simd_ctx_save(SECURE, false); in pncd_synchronous_sp_exit()
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| H A D | pncd_main.c | 97 security_state == SECURE ? NON_SECURE : SECURE; in pncd_context_switch_to() 106 assert(sec_state_from == SECURE); in pncd_context_switch_to() 126 context_save(SECURE); in pncd_context_switch_to() 151 if (sec_state_from == SECURE) { in pncd_context_switch_to() 188 handle = pncd_context_switch_to(SECURE); in pncd_sel1_interrupt_handler() 216 pnc_ep_info = bl31_plat_get_next_image_ep_info(SECURE); in pncd_setup() 263 pnc_entry_point = bl31_plat_get_next_image_ep_info(SECURE); in pncd_init() 417 assert(handle == cm_get_context(ns != 0 ? NON_SECURE : SECURE)); in pncd_smc_handler_unsafe() 418 handle = pncd_context_switch_to(ns != 0 ? SECURE : NON_SECURE); in pncd_smc_handler_unsafe()
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| /rk3399_ARM-atf/services/spd/tlkd/ |
| H A D | tlkd_common.c | 28 cm_el1_sysregs_context_save(SECURE); in tlkd_va_translate() 65 cm_el1_sysregs_context_restore(SECURE); in tlkd_va_translate() 68 write_scr(cm_get_scr_el3(SECURE)); in tlkd_va_translate() 95 cm_set_context(&tlk_ctx->cpu_ctx, SECURE); in tlkd_init_tlk_ep_state() 106 ep_attr = SECURE | EP_ST_ENABLE; in tlkd_init_tlk_ep_state() 131 assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx); in tlkd_synchronous_sp_entry() 132 cm_el1_sysregs_context_restore(SECURE); in tlkd_synchronous_sp_entry() 133 cm_set_next_eret_context(SECURE); in tlkd_synchronous_sp_entry() 157 assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx); in tlkd_synchronous_sp_exit() 158 cm_el1_sysregs_context_save(SECURE); in tlkd_synchronous_sp_exit()
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| H A D | tlkd_main.c | 72 disable_intr_rm_local(INTR_TYPE_S_EL1, SECURE); in tlkd_interrupt_handler() 82 s_cpu_context = cm_get_context(SECURE); in tlkd_interrupt_handler() 90 cm_el1_sysregs_context_restore(SECURE); in tlkd_interrupt_handler() 91 cm_set_next_eret_context(SECURE); in tlkd_interrupt_handler() 112 tlk_ep_info = bl31_plat_get_next_image_ep_info(SECURE); in tlkd_setup() 173 tlk_entry_point = bl31_plat_get_next_image_ep_info(SECURE); in tlkd_init() 233 assert(handle == cm_get_context(SECURE)); in tlkd_smc_handler() 234 cm_el1_sysregs_context_save(SECURE); in tlkd_smc_handler() 308 assert(&tlk_ctx.cpu_ctx == cm_get_context(SECURE)); in tlkd_smc_handler() 319 cm_el1_sysregs_context_restore(SECURE); in tlkd_smc_handler() [all …]
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| /rk3399_ARM-atf/services/spd/opteed/ |
| H A D | opteed_common.c | 39 cm_set_context(&optee_ctx->cpu_ctx, SECURE); in opteed_init_optee_ep_state() 42 ep_attr = SECURE | EP_ST_ENABLE; in opteed_init_optee_ep_state() 79 assert(cm_get_context(SECURE) == &optee_ctx->cpu_ctx); in opteed_synchronous_sp_entry() 80 cm_el1_sysregs_context_restore(SECURE); in opteed_synchronous_sp_entry() 81 cm_set_next_eret_context(SECURE); in opteed_synchronous_sp_entry() 104 assert(cm_get_context(SECURE) == &optee_ctx->cpu_ctx); in opteed_synchronous_sp_exit() 105 cm_el1_sysregs_context_save(SECURE); in opteed_synchronous_sp_exit()
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| H A D | opteed_pm.c | 43 cm_set_elr_el3(SECURE, (uint64_t) &optee_vector_table->cpu_off_entry); in opteed_cpu_off_handler() 83 cm_set_elr_el3(SECURE, (uint64_t) &optee_vector_table->cpu_suspend_entry); in opteed_cpu_suspend_handler() 160 cm_set_elr_el3(SECURE, (uint64_t) &optee_vector_table->cpu_resume_entry); in opteed_cpu_suspend_finish_handler() 204 cm_set_elr_el3(SECURE, (uint64_t) &optee_vector_table->system_off_entry); in opteed_system_off() 232 cm_set_elr_el3(SECURE, (uint64_t) &optee_vector_table->system_reset_entry); in opteed_system_reset()
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| H A D | opteed_main.c | 111 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); in opteed_sel1_interrupt_handler() 113 cm_set_elr_el3(SECURE, (uint64_t)&optee_vector_table->fiq_entry); in opteed_sel1_interrupt_handler() 114 cm_el1_sysregs_context_restore(SECURE); in opteed_sel1_interrupt_handler() 115 cm_set_next_eret_context(SECURE); in opteed_sel1_interrupt_handler() 179 optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE); in opteed_setup() 287 optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE); in opteed_init() 690 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); in opteed_smc_handler() 697 cm_set_elr_el3(SECURE, (uint64_t) in opteed_smc_handler() 700 cm_set_elr_el3(SECURE, (uint64_t) in opteed_smc_handler() 704 cm_el1_sysregs_context_restore(SECURE); in opteed_smc_handler() [all …]
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| /rk3399_ARM-atf/plat/st/stm32mp2/ |
| H A D | plat_bl2_mem_params_desc.c | 34 SECURE | NON_EXECUTABLE), 51 SECURE | NON_EXECUTABLE), 68 SECURE | EXECUTABLE | EP_FIRST_EXE), 85 SECURE | NON_EXECUTABLE), 100 SECURE | EXECUTABLE), 115 SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/ |
| H A D | hikey960_bl2_mem_params_desc.c | 28 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 46 SECURE | EXECUTABLE | EP_FIRST_EXE), 66 SECURE | EXECUTABLE | EP_FIRST_EXE), 92 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE), 112 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 131 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 147 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/plat/qemu/common/ |
| H A D | qemu_bl2_mem_params_desc.c | 17 SECURE | NON_EXECUTABLE), \ 39 SECURE | EXECUTABLE | EP_FIRST_EXE), 56 SECURE | EXECUTABLE | EP_FIRST_EXE), 95 #define BL32_EP_ATTRIBS (SECURE | EXECUTABLE) 98 #define BL32_EP_ATTRIBS (SECURE | EXECUTABLE | EP_FIRST_EXE) 130 entry_point_info_t, SECURE | NON_EXECUTABLE), 148 entry_point_info_t, SECURE | NON_EXECUTABLE), 164 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 178 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/plat/st/stm32mp1/ |
| H A D | plat_bl2_mem_params_desc.c | 27 SECURE | NON_EXECUTABLE), 44 SECURE | EXECUTABLE | EP_FIRST_EXE), 63 SECURE | NON_EXECUTABLE), 78 SECURE | NON_EXECUTABLE), 106 SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/plat/marvell/armada/common/aarch64/ |
| H A D | marvell_bl2_mem_params_desc.c | 29 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 47 SECURE | EXECUTABLE | EP_FIRST_EXE), 67 SECURE | EXECUTABLE | EP_FIRST_EXE), 93 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE), 113 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 132 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/plat/hisilicon/hikey/ |
| H A D | hikey_bl2_mem_params_desc.c | 28 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 46 SECURE | EXECUTABLE | EP_FIRST_EXE), 66 SECURE | EXECUTABLE | EP_FIRST_EXE), 92 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE), 112 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 131 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/plat/hisilicon/poplar/ |
| H A D | bl2_plat_mem_params_desc.c | 28 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 46 SECURE | EXECUTABLE | EP_FIRST_EXE), 66 SECURE | EXECUTABLE | EP_FIRST_EXE), 92 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE), 112 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 131 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/plat/arm/common/aarch64/ |
| H A D | arm_bl2_mem_params_desc.c | 27 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 45 SECURE | EXECUTABLE | EP_FIRST_EXE), 65 SECURE | EXECUTABLE | EP_FIRST_EXE), 100 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 127 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE), 151 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 170 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 185 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/include/common/ |
| H A D | ep_info.h | 19 #define SECURE EP_SECURE macro 23 #define sec_state_is_valid(s) (((s) == SECURE) || \ 27 #define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE))
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| /rk3399_ARM-atf/plat/imx/imx8m/imx8mp/ |
| H A D | imx8mp_bl2_mem_params_desc.c | 17 SECURE | EXECUTABLE | EP_FIRST_EXE), 32 SECURE | EXECUTABLE), 48 SECURE | NON_EXECUTABLE), 63 SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/plat/imx/imx8m/imx8mm/ |
| H A D | imx8mm_bl2_mem_params_desc.c | 17 SECURE | EXECUTABLE | EP_FIRST_EXE), 32 SECURE | EXECUTABLE), 48 SECURE | NON_EXECUTABLE), 63 SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/bl1/tbbr/ |
| H A D | tbbr_img_desc.c | 20 VERSION_1, entry_point_info_t, SECURE), 38 VERSION_1, entry_point_info_t, SECURE), 49 VERSION_1, entry_point_info_t, SECURE | EXECUTABLE),
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| /rk3399_ARM-atf/plat/rpi/rpi3/aarch64/ |
| H A D | rpi3_bl2_mem_params_desc.c | 29 SECURE | EXECUTABLE | EP_FIRST_EXE), 56 SECURE | EXECUTABLE), 77 SECURE | NON_EXECUTABLE), 98 SECURE | NON_EXECUTABLE),
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| /rk3399_ARM-atf/bl1/ |
| H A D | bl1_fwu.c | 248 if (GET_SECURITY_STATE(flags) == SECURE) { in bl1_fwu_image_copy() 385 if (GET_SECURITY_STATE(flags) == SECURE) { in bl1_fwu_image_auth() 392 if (GET_SECURITY_STATE(desc->ep_info.h.attr) == SECURE) { in bl1_fwu_image_auth() 522 (GET_SECURITY_STATE(flags) == SECURE) || in bl1_fwu_image_execute() 544 *handle = cm_get_context(SECURE); in bl1_fwu_image_execute() 546 *handle = smc_get_ctx(SECURE); in bl1_fwu_image_execute() 576 assert(GET_SECURITY_STATE(desc->ep_info.h.attr) == SECURE); in bl1_fwu_image_resume() 579 if (caller_sec_state == SECURE) { in bl1_fwu_image_resume() 590 resume_sec_state = SECURE; in bl1_fwu_image_resume() 594 (resume_sec_state == SECURE) ? "secure" : "normal"); in bl1_fwu_image_resume() [all …]
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| /rk3399_ARM-atf/plat/imx/imx7/common/ |
| H A D | imx7_bl2_mem_params_desc.c | 19 SECURE | EXECUTABLE | EP_FIRST_EXE), 35 SECURE | NON_EXECUTABLE), 50 SECURE | NON_EXECUTABLE),
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