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Searched refs:SAR_PCIE0_CLK_CFG_MASK (Results 1 – 1 of 1) sorted by relevance

/rk3399_ARM-atf/drivers/marvell/mochi/
H A Dcp110_setup.c66 #define SAR_PCIE0_CLK_CFG_MASK (0x1 << SAR_PCIE0_CLK_CFG_OFFSET) macro
181 pcie0_clk = (reg & SAR_PCIE0_CLK_CFG_MASK) >> SAR_PCIE0_CLK_CFG_OFFSET; in cp110_pcie_clk_cfg()