Searched refs:S10_MPFE_IOHMC_REG_DRAMTIMING0_CFG_TCL (Results 1 – 2 of 2) sorted by relevance
105 #define S10_MPFE_IOHMC_REG_DRAMTIMING0_CFG_TCL(x) (((x) & 0x0000007f) >> 0) macro
237 rd_latency = S10_MPFE_IOHMC_REG_DRAMTIMING0_CFG_TCL(data); in configure_ddr_sched_ctrl_regs()