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Searched refs:RCC_PLL2CFGR1 (Results 1 – 7 of 7) sorted by relevance

/rk3399_ARM-atf/drivers/st/ddr/
H A Dstm32mp2_ddr_helpers.c517 mmio_clrbits_32(rcc_base + RCC_PLL2CFGR1, RCC_PLL2CFGR1_PLLEN); in ddr_sub_system_clk_off()
/rk3399_ARM-atf/include/drivers/st/
H A Dstm32mp13_rcc.h45 #define RCC_PLL2CFGR1 U(0X4D4) macro
H A Dstm32mp15_rcc.h32 #define RCC_PLL2CFGR1 U(0x98) macro
H A Dstm32mp21_rcc.h333 #define RCC_PLL2CFGR1 U(0x590) macro
H A Dstm32mp25_rcc.h349 #define RCC_PLL2CFGR1 U(0x590) macro
/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32mp2.c719 CLK_PLL_CFG(_PLL2, _CK_PLL2, RCC_PLL2CFGR1),
H A Dstm32mp1_clk.c817 RCC_RCK12SELR, RCC_PLL2CFGR1, RCC_PLL2CFGR2,