Searched refs:POSTDIV1 (Results 1 – 4 of 4) sorted by relevance
29 POSTDIV1, enumerator
31 #define POSTDIV1(n) ((0x7 << (8 + 16)) | (n << 8)) macro
1680 pllcfg[POSTDIV1] & RCC_PLLxCFGR6_POSTDIV1_MASK); in clk_stm32_pll_config_output()1684 if ((pllcfg[POSTDIV1] == 0U) || (pllcfg[POSTDIV2] == 0U)) { in clk_stm32_pll_config_output()1763 pll_conf->cfg[POSTDIV1], pll_conf->cfg[POSTDIV2]); in _clk_stm32_pll1_init()
1970 POSTDIV2(pll_div.postdiv2) | POSTDIV1(pll_div.postdiv1) | in m0_configure_ddr()