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Searched refs:MP_CPUSYS_TOP_MP_ADB_DCM_CFG4 (Results 1 – 6 of 6) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/dcm/
H A Dmtk_dcm_utils.c37 ret &= ((mmio_read_32(MP_CPUSYS_TOP_MP_ADB_DCM_CFG4) & in dcm_mp_cpusys_top_adb_dcm_is_on()
51 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP_ADB_DCM_CFG4, in dcm_mp_cpusys_top_adb_dcm()
59 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP_ADB_DCM_CFG4, in dcm_mp_cpusys_top_adb_dcm()
H A Dmtk_dcm_utils.h29 #define MP_CPUSYS_TOP_MP_ADB_DCM_CFG4 (MP_CPUSYS_TOP_BASE + 0x2510) macro
/rk3399_ARM-atf/plat/mediatek/drivers/dcm/
H A Dmtk_dcm_utils.c33 ret &= dcm_check_state(MP_CPUSYS_TOP_MP_ADB_DCM_CFG4, in dcm_mp_cpusys_top_adb_dcm_is_on()
50 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP_ADB_DCM_CFG4, in dcm_mp_cpusys_top_adb_dcm()
61 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP_ADB_DCM_CFG4, in dcm_mp_cpusys_top_adb_dcm()
H A Dmtk_dcm_utils.h26 #define MP_CPUSYS_TOP_MP_ADB_DCM_CFG4 (MP_CPUSYS_TOP_BASE + 0x2510) macro
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/dcm/
H A Dmtk_dcm_utils.h25 #define MP_CPUSYS_TOP_MP_ADB_DCM_CFG4 (MP_CPUSYS_TOP_BASE + 0x2510) macro
H A Dmtk_dcm_utils.c49 ret &= ((mmio_read_32(MP_CPUSYS_TOP_MP_ADB_DCM_CFG4) & in dcm_mp_cpusys_top_adb_dcm_is_on()
66 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP_ADB_DCM_CFG4, in dcm_mp_cpusys_top_adb_dcm()
77 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP_ADB_DCM_CFG4, in dcm_mp_cpusys_top_adb_dcm()